參數(shù)資料
型號(hào): 74ALVCH16373TX
廠商: FAIRCHILD SEMICONDUCTOR CORP
元件分類(lèi): 通用總線功能
英文描述: LATCH|DUAL|8-BIT|AVC/ALVC-CMOS|TSSOP|48PIN|PLASTIC
中文描述: ALVC/VCX/A SERIES, DUAL 8-BIT DRIVER, TRUE OUTPUT, PDSO48
封裝: 6.10 MM, MO-153, TSSOP-48
文件頁(yè)數(shù): 3/7頁(yè)
文件大小: 95K
代理商: 74ALVCH16373TX
3
www.fairchildsemi.com
7
Functional Description
The 74ALVCH16373 contains sixteen edge D-type latches
with 3-STATE outputs. The device is byte controlled with
each byte functioning identically, but independent of the
other. Control pins can be shorted together to obtain full
16-bit operation. The following description applies to each
byte. When the Latch Enable (LE
n
) input is HIGH, data on
the I
n
enters the latches. In this condition the latches are
transparent, i.e., a latch output will change state each time
its I input changes. When LE
n
is LOW, the latches store
information that was present on the I inputs a setup time
preceding the HIGH-to-LOW transition on LE
n
. The
3-STATE outputs are controlled by the Output Enable
(OE
n
) input. When OE
n
is LOW the standard outputs are in
the 2-state mode. When OE
n
is HIGH, the standard outputs
are in the high impedance mode but this does not interfere
with entering new data into the latches.
Logic Diagram
Please note that this diagram is provided only for the understanding of logic operations and should not be used to estimate propagation delays.
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