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| 型號(hào)： | 73S1217F-68MR/F/PE |
| 廠商： | Maxim Integrated Products |
| 文件頁(yè)數(shù)： | 115/140頁(yè) |
| 文件大?。?/td> | 0K |
| 描述： | IC SOC SMART CARD READER 68QFN |
| 標(biāo)準(zhǔn)包裝： | 2,500 |
| 系列： | * |
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73S1217F Data Sheet
DS_1217F_002
decoding, handshake packet generation, Data0/Data1 toggle synchronization, bit stuffing, bus idle
detection and other protocol generation/checking required in Chapter 8 of the USB specification.
The firmware is responsible for servicing and building the messages required under Chapter 9 of the USB
specification. Device configuration is stored in the firmware. Data received from the USB port is stored in
the appropriate IN FIFO that is read by the firmware and processed. The messages to be sent back to
the USB host are generated by firmware and placed back into the appropriate OUT FIFO. Stall/NAK
handshakes are generated as appropriate if the RAM is not available for another message from the USB
host. Suspend and resume modes are supported. All register/FIFO spaces are located in Data Memory
space. The FIFOs are dedicated for USB storage and are unused in a configuration that is not using
USB. All registers in the USB interface are located in external data memory address (XRAM) space
starting at address FC00’h.
1.7.16.1
USB Interface Implementation
The 73S1217F Application Programming Interface includes some dedicated software commands to
configure the USB interface, to get a status of each USB Endpoint, to stall / unstall portions of the USB,
and to send / receive data to / from each endpoint.
USB API entirely manages the USB circuitry, the USB registers and the FIFOs. Use of those commands
facilitates USB implementation, without dealing with low-level programming.
Miscellaneous Control Register 1 (MISCtl1): 0xFFF2
0x10
Table 77: The MISCtl1 Register
MSB
LSB
–
FRPEN
FLSH66
–
ANAPEN USBPEN USBCON
Bit
Symbol
Function
MISCtl1.7
–
MISCtl1.6
–
MISCtl1.5
FRPEN
Flash Read Pulse enable.
MISCtl1.4
FLSH66
Flash Read Pulse.
MISCtl1.3
–
MISCtl1.2
ANAPEN
Analog power enable.
MISCtl1.1
USBPEN
0 = Enable the USB differential transceiver.
MISCtl1.0
USBCON
1 = Connect pull-up resistor from VDD to D+. If connected, the USB host
will recognize the attachment of a USB device and begin enumeration.
Note: When using the USB on the 73S1217F, external 24 series resistors must be added to the D+ and
D- signals to provide the proper impedance matching on these pins.
The USB peripheral block is not able to support read or write operations to the USB SFR registers when
the MPU clock is running at MPU clock rates of 12MHz or greater. In order to properly communicate with
the USB SFR registers when running at these speeds, wait states must be inserted when addressing the
USB SFRs. The CKCON register allows wait states to be inserted when accessing these registers. The
proper settings for the number of wait states are shown in Error! Reference source not found..
When changing the MPU clock rate or the number of wait states, the USB connection
must be inactive. If the USB is active, then it must be inactivated before changing the
MPU clock or number of wait states. It can then be reconnected and re-enumerated.
Changing these parameters while the USB interface is active may cause communication errors on
the USB interface.
76
Rev. 1.2
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