參數(shù)資料
型號: 73M2910L
廠商: Electronic Theatre Controls, Inc.
英文描述: Microcontroller
中文描述: 微控制器
文件頁數(shù): 11/35頁
文件大小: 572K
代理商: 73M2910L
73M2910L
Microcontroller
11
The chip selects partition a 64K memory space as follows:
CHIP SELECT PIN
ADDRESS
# BYTES
RESERVED FOR INTERNAL USE
0000H - 00FFH
256
CS0
(USR4.0)
0100H - 01FFH
256
CS1
(USR4.1)
0200H - 03FFH
512
CS2
(USR4.2)
0400H - 07FFH
1K
CS3
(USR4.3)
0800H - 0FFFH
2K
CS4
(USR4.4)
1000H - 1FFFH
4K
CS5
(USR4.5)
2000H - 3FFFH
8K
CS6
(USR4.6)
4000H - 7FFFH
16K
CS7
(USR4.7)
8000H - FFFFH
32K
NOTE:External addresses 0000H-00FFH may not be read. These are reserved for 73M2910L internally defined
registers
USR5 PORT
USR5 Port Register External Address 0006h
Byte Addressable
Reset State 60h
BIT 7
BIT 6
BIT 5
BIT 4
BIT 3
BIT 2
BIT 1
BIT 0
USR5EN
USR5.0
USR5.1
POL5.0
POL5.1
ACTE0
ACTE1
AND01
This register allows user programmable wakeup capability. If this is not required, this register can be used to
read external signals at the USR5.1 and USR5.0 pins.
Bit 7 USR5 Input Port Enable
Bit 7 is used to enable the USR5.1 and USR5.0 input circuitry. If this bit is a 0, the USR5 pin output circuitry is
driven to a known level internally and any signal level at the pin is ignored. When set to a 1 the pin input
circuitry is enabled and the values of these pins are reflected in bits 6 and 7. If these pins are not connected at
the board level, this bit should remain at a 0 to keep the pin input circuitry from drawing unnecessary current.
The USR5 Register can be programmed such that a transition (bit 4 determines rising or falling) of USR5.0, a
transition (bit 3 determines rising or falling) of USR5.1, or the logical combination of USR5.0 (bit 4 determines
high or low level) AND USR5.1 (bit 3 determines high or low level) can wakeup the processor from its
power-down mode.
BIT 6 USR5.0
Bit 6 reflects the value of chip pin USR5.0 if the USR5EN bit is set to a 1.
BIT 5 USR5.1
Bit 5 reflects the value of chip pin USR5.1 if the USR5EN bit is set to a 1.
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