參數資料
型號: 71V416S10PHGI
廠商: INTEGRATED DEVICE TECHNOLOGY INC
元件分類: SRAM
英文描述: 256K X 16 STANDARD SRAM, 10 ns, PDSO44
封裝: 0.400 INCH, TSOP2-44
文件頁數: 5/9頁
文件大?。?/td> 1397K
代理商: 71V416S10PHGI
6.42
IDT71V416S, IDT71V416L, 3.3V CMOS Static RAM
4 Meg (256K x 16-Bit) Commercial and Industrial Temperature Ranges
AC Electrical Characteristics
(V
DD
= Mn. to Max., Commercial and Industrial Temperature Ranges)
5
71V416S/L10
(2)
71V416S/L12
71V416S/L15
Symbol
Parameter
Min.
Max.
Mn.
Max.
Min.
Max.
Unit
READ CYCLE
t
RC
Read Cycle Time
10
____
12
____
15
____
ns
t
AA
Address Access Time
____
10
____
12
____
15
ns
t
ACS
Chip Select Access Time
____
10
____
12
____
15
ns
t
CLZ
(1)
Chip Select Low to Output in Low-Z
4
____
4
____
4
____
ns
t
CHZ
(1)
Chip Select High to Output in High-Z
____
5
____
6
____
7
ns
t
OE
Output Enable Lowto Output Valid
____
5
____
6
____
7
ns
t
OLZ
(1)
Output Enable Low to Output in Low-Z
0
____
0
____
0
____
ns
t
OHZ
(1)
Output Enable High to Output in High-Z
____
5
____
6
____
7
ns
t
OH
Output Hold fromAddress Change
4
____
4
____
4
____
ns
t
BE
Byte Enable Low to Output Valid
____
5
____
6
____
7
ns
t
BLZ
(1)
Byte Enable Low to Output in Low-Z
0
____
0
____
0
____
ns
t
BHZ
(1)
Byte Enable High to Output in High-Z
____
5
____
6
____
7
ns
WRITE CYCLE
t
WC
Write Cycle Time
10
____
12
____
15
____
ns
t
AW
Address Valid to End of Write
8
____
8
____
10
____
ns
t
CW
Chip Select Low to End of Write
8
____
8
____
10
____
ns
t
BW
Byte Enable Low to End of Write
8
____
8
____
10
____
ns
t
AS
Address Set-up Time
0
____
0
____
0
____
ns
t
WR
Address Hold fromEnd of Write
0
____
0
____
0
____
ns
t
WP
Write Pulse Width
8
____
8
____
10
____
ns
t
DW
Data Valid to End of Write
5
____
6
____
7
____
ns
t
DH
Data Hold Time
0
____
0
____
0
____
ns
t
OW
(1)
Write Enable High to Output in Low-Z
3
____
3
____
3
____
ns
t
WHZ
(1)
Write Enable Lowto Output in High-Z
____
6
____
7
____
7
ns
3624 tbl 10
Timing Waveform of Read Cycle No. 1
(1,2,3)
NOTE:
1. This parameter is guaranteed with the AC Load (Figure 2) by device characterization, but is not production tested.
2. Low power 10ns (L10) speed 0oC to +70oC temperature range only.
DATA
OUT
ADDRESS
3624 drw 06
t
RC
t
AA
t
OH
DATA
OUT
VALID
PREVIOUS DATA
OUT
VALID
t
OH
NOTES:
1.
WE
is HIGH for Read Cycle.
2. Device is continuously selected,
CS
is LOW.
3.
OE
,
BHE
, and
BLE
are LOW.
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