- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄299200 > 7140LA25JGI (INTEGRATED DEVICE TECHNOLOGY INC) 1K X 8 DUAL-PORT SRAM, 25 ns, PQCC52 PDF資料下載
參數(shù)資料
| 型號(hào)： | 7140LA25JGI |
| 廠商： | INTEGRATED DEVICE TECHNOLOGY INC |
| 元件分類： | SRAM |
| 英文描述： | 1K X 8 DUAL-PORT SRAM, 25 ns, PQCC52 |
| 封裝： | 0.750 X 0.750 INCH, 0.170 INCH HEIGHT, GREEN, PLASTIC, LCC-52 |
| 文件頁數(shù)： | 19/19頁 |
| 文件大?。?/td> | 149K |
| 代理商： | 7140LA25JGI |
9
IDT7130SA/LA and IDT7140SA/LA
High-Speed 1K x 8 Dual-Port Static SRAM
Military, Industrial and Commercial Temperature Ranges
Timing Waveform of Read Cycle No. 2, Either Side(3)
NOTES:
1. Timing depends on which signal is asserted last,
OE or CE.
2. Timing depends on which signal is deaserted first,
OE or CE.
3. R/
W = VIH and OE = VIL, and the address is valid prior to or coincidental with CE transition LOW.
4.
Start of valid data depends on which timing becomes effective last tAOE, tACE, tAA, and tBDD.
Timing Waveform of Read Cycle No. 1, Either Side(1)
ADDRESS
DATAOUT
tRC
tOH
PREVIOUS DATA VALID
tAA
tOH
DATA VALID
2689 drw 08
tBDDH
(2,3)
BUSYOUT
NOTES:
1. R/
W = VIH, CE = VIL, and is OE = VIL. Address is valid prior to the coincidental with CE transition LOW.
2. tBDD delay is required only in the case where the opposite port is completing a write operation to the same the address location. For simultaneous read operations,
BUSY has no relationship to valid output data.
3. Start of valid data depends on which timing becomes effective last tAOE, tACE, tAA, and tBDD.
CE
tACE
tAOE
tHZ
tLZ
tPD
VALID DATA
tPU
50%
OE
DATAOUT
CURRENT
ICC
ISS
50%
2689 drw 09
(4)
(1)
(2)
(4)
tLZ
tHZ
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| IDT7140SA25PFGB | HIGH SPEED 1K X 8 DUAL-PORT STATIC SRAM |
| IDT7140SA25PFGI | HIGH SPEED 1K X 8 DUAL-PORT STATIC SRAM |
| IDT7140SA25TFG | HIGH SPEED 1K X 8 DUAL-PORT STATIC SRAM |
| IDT7140SA25TFGB | HIGH SPEED 1K X 8 DUAL-PORT STATIC SRAM |
| IDT7140SA25TFGI | HIGH SPEED 1K X 8 DUAL-PORT STATIC SRAM |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| 7140LA25JI | 功能描述:靜態(tài)隨機(jī)存取存儲(chǔ)器 RoHS:否 制造商:Cypress Semiconductor 存儲(chǔ)容量:16 Mbit 組織:1 M x 16 訪問時(shí)間:55 ns 電源電壓-最大:3.6 V 電源電壓-最小:2.2 V 最大工作電流:22 uA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:TSOP-48 封裝:Tray |
| 7140LA25JI8 | 功能描述:靜態(tài)隨機(jī)存取存儲(chǔ)器 RoHS:否 制造商:Cypress Semiconductor 存儲(chǔ)容量:16 Mbit 組織:1 M x 16 訪問時(shí)間:55 ns 電源電壓-最大:3.6 V 電源電壓-最小:2.2 V 最大工作電流:22 uA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:TSOP-48 封裝:Tray |
| 7140LA25PF | 功能描述:靜態(tài)隨機(jī)存取存儲(chǔ)器 RoHS:否 制造商:Cypress Semiconductor 存儲(chǔ)容量:16 Mbit 組織:1 M x 16 訪問時(shí)間:55 ns 電源電壓-最大:3.6 V 電源電壓-最小:2.2 V 最大工作電流:22 uA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:TSOP-48 封裝:Tray |
| 7140LA25PF8 | 功能描述:靜態(tài)隨機(jī)存取存儲(chǔ)器 RoHS:否 制造商:Cypress Semiconductor 存儲(chǔ)容量:16 Mbit 組織:1 M x 16 訪問時(shí)間:55 ns 電源電壓-最大:3.6 V 電源電壓-最小:2.2 V 最大工作電流:22 uA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:TSOP-48 封裝:Tray |
| 7140LA25PFG | 功能描述:靜態(tài)隨機(jī)存取存儲(chǔ)器 RoHS:否 制造商:Cypress Semiconductor 存儲(chǔ)容量:16 Mbit 組織:1 M x 16 訪問時(shí)間:55 ns 電源電壓-最大:3.6 V 電源電壓-最小:2.2 V 最大工作電流:22 uA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:TSOP-48 封裝:Tray |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。