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參數(shù)資料
| 型號(hào)： | 70T9169L12PF8 |
| 廠商： | INTEGRATED DEVICE TECHNOLOGY INC |
| 元件分類： | SRAM |
| 英文描述： | 16K X 9 DUAL-PORT SRAM, 25 ns, PQFP100 |
| 封裝： | TQFP-100 |
| 文件頁(yè)數(shù)： | 2/16頁(yè) |
| 文件大?。?/td> | 252K |
| 代理商： | 70T9169L12PF8 |
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6.42
IDT70T9169/59L
High-Speed 2.5V 16/8K x 9 Synchronous Pipelined Dual-Port Static RAM
Industrial and Commercial Temperature Ranges
10
Timing Waveform of Write with Port-to-Port Flow-Through Read(4,5,7)
NOTES:
1. B1 Represents Bank #1; B2 Represents Bank #2. Each Bank consists of one IDT70T9169/59 for this waveform, and are setup for depth expansion in this
example. ADDRESS(B1) = ADDRESS(B2) in this situation.
2. OE and ADS = VIL; CE1(B1), CE1(B2), R/W, CNTEN, and CNTRST = VIH.
3. Transition is measured 0mV from Low or High-impedance voltage with the Output Test Load (Figure 2).
4. CE0 and ADS = VIL; CE1, CNTEN, and CNTRST = VIH.
5. OE = VIL for the Right Port, which is being read from. OE = VIH for the Left Port, which is being written to.
6. If tCCS < maximum specified, then data from right port READ is not valid until the maximum specified for tCWDD.
If tCCS > maximum specified, then data from right port READ is not valid until tCCS + tCD1. tCWDD does not apply in this case.
7. All timing is the same for both Left and Right ports. Port "A" may be either Left or Right port. Port "B" is the opposite from Port "A".
Timing Waveform of a Bank Select Pipelined Read(1,2)
tSC
tHC
CE0(B1)
ADDRESS(B1)
A0
A1
A2
A3
A4
A5
tSA
tHA
CLK
5654 drw 09
Q0
Q1
Q3
DATAOUT(B1)
tCH2
tCL2
tCYC2
(3)
ADDRESS(B2)
A0
A1
A2
A3
A4
A5
tSA
tHA
CE0(B2)
DATAOUT(B2)
Q2
Q4
tCD2
tCKHZ
tCD2
tCKLZ
tDC
tCKHZ
tCD2
tCKLZ
(3)
tSC
tHC
(3)
tCKHZ
(3)
tCKLZ
(3)
tCD2
A6
tDC
tSC
tHC
tSC
tHC
DATAIN "A"
CLK "B"
R/
W "B"
ADDRESS "A"
R/
W "A"
CLK "A"
ADDRESS "B"
NO
MATCH
NO
MATCH
VALID
tCWDD
tCD1
tDC
DATAOUT "B"
5654 drw 10
VALID
tSW
tHW
tSA
tHA
tSD
tHD
tHW
tCD1
tCCS
tDC
tSA
tSW
tHA
(6)
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| 70T9169PF | 制造商:IDT 制造商全稱:Integrated Device Technology 功能描述:HIGH-SPEED 2.5V 16/8K X 9 SYNCHRONOUS PIPELINED DUAL-PORT STATIC RAM |
| 70TPS12 | 功能描述:SCR 1200 Volt 75 Amp RoHS:否 制造商:STMicroelectronics 最大轉(zhuǎn)折電流 IBO:480 A 額定重復(fù)關(guān)閉狀態(tài)電壓 VDRM:600 V 關(guān)閉狀態(tài)漏泄電流（在 VDRM IDRM 下）:5 uA 開啟狀態(tài) RMS 電流 (It RMS): 正向電壓下降:1.6 V 柵觸發(fā)電壓 (Vgt):1.3 V 最大柵極峰值反向電壓:5 V 柵觸發(fā)電流 (Igt):35 mA 保持電流（Ih 最大值）:75 mA 安裝風(fēng)格:Through Hole 封裝 / 箱體:TO-220 封裝:Tube |
| 70TPS12PBF | 功能描述:SCR PH CONTR 1200V 70A SUPER-247 RoHS:是 類別:分離式半導(dǎo)體產(chǎn)品 >> SCR - 單個(gè) 系列:- 其它有關(guān)文件:X00619 View All Specifications 產(chǎn)品目錄繪圖:SCR TO-92 Package 標(biāo)準(zhǔn)包裝:1 系列:- SCR 型:靈敏柵極 電壓 - 斷路:600V 電壓 - 柵極觸發(fā)器 (Vgt)（最大）:800mV 電壓 - 導(dǎo)通狀態(tài) (Vtm)（最大）:1.35V 電流 - 導(dǎo)通狀態(tài) (It (AV))（最大）:500mA 電流 - 導(dǎo)通狀態(tài) (It (RMS))（最大）:800mA 電流 - 柵極觸發(fā)電流 (Igt)（最大）:200µA 電流 - 維持(Ih):5mA 電流 - 斷開狀態(tài)（最大）:1µA 電流 - 非重復(fù)電涌，50、60Hz (Itsm):9A，10A 工作溫度:-40°C ~ 125°C 安裝類型:通孔 封裝/外殼:TO-226-3、TO-92-3（TO-226AA）成形引線 供應(yīng)商設(shè)備封裝:TO-92-3 包裝:剪切帶 (CT) 產(chǎn)品目錄頁(yè)面:1554 (CN2011-ZH PDF) 其它名稱:497-9067-1 |
| 70TPS12PBF_10 | 制造商:VISHAY 制造商全稱:Vishay Siliconix 功能描述:Phase Control SCR, 70 A |
| 70TPS16 | 功能描述:SCR 1600 Volt 75 Amp RoHS:否 制造商:STMicroelectronics 最大轉(zhuǎn)折電流 IBO:480 A 額定重復(fù)關(guān)閉狀態(tài)電壓 VDRM:600 V 關(guān)閉狀態(tài)漏泄電流（在 VDRM IDRM 下）:5 uA 開啟狀態(tài) RMS 電流 (It RMS): 正向電壓下降:1.6 V 柵觸發(fā)電壓 (Vgt):1.3 V 最大柵極峰值反向電壓:5 V 柵觸發(fā)電流 (Igt):35 mA 保持電流（Ih 最大值）:75 mA 安裝風(fēng)格:Through Hole 封裝 / 箱體:TO-220 封裝:Tube |
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