參數(shù)資料
型號(hào)： 7005
廠商： Aeroflex Inc.
英文描述： ACT7005/7006 Single Package Solution Dual Transceiver, Protocol, Subsystem
中文描述： ACT7005/7006單一封裝解決方案雙收發(fā)器，協(xié)議，子系統(tǒng)
文件頁數(shù)： 13/29頁
文件大?。?/td> 452K
代理商： 7005
Aeroflex Circuit Technology
SCD7005 REV B 8/2/01
Plainview NY (516) 694-6700
13
Name
Use
INT #1
GOOD BLOCK (RT)
Indicates reception of a valid block of data. The RECEIVE COMMAND WORD
is loaded in RCV CMD WD Register. This interrupt is issued after the new
block of data is moved into the Internal RAM.
VALID (BC)
Indicates that the Bus Controller has initiated and observed a valid message
transfer on the 1553 data bus.
INT #2
VALID TRANS (RT)
Indicates reception of a valid TRANSMIT COMMAND WORD. The
TRANSMIT COMMAND WORD is loaded in CMD WD Register. Note: This
interrupt does not necessarily indicate that the transmitted data was received
by the bus controller.
INVALID (BC)
Indicates that the Bus Controller has initiated a message transfer on the data
bus, but the message traffic has been deemed invalid.
SYNC NO DATA
Indicates reception of a valid mode command SYNCHRONIZE WITHOUT
DATA
SYNC W/DATA
Indicates reception of a valid mode command SYNCHRONIZE WITH DATA.
The synchronize data word is loaded into the SYNC/STAT WD #2/RMD
REGISTER. This interrupt will not be issued if a word count high or low error
occurs.
DONE
This interrupt is issued in response to an I/0 command from the subsystem. In
response to an I/0 load OUTPUT buffer command, it indicates that the
complete 32 word message block (SUBADDRESS) has been loaded into the
OUTPUT FIFO buffer. In response to an I/0 load internal RAM from INPUT
FIFO buffer command, it indicates the full message (1 to 32 WORDS) has
been loaded.
TIMING
a. In response to an I/0 load OUTPUT buffer: 16.5 to 33 μsec.*
b. In response to an I/0 load RAM from INPUT buffer: 16.5 to 33 μsec for 32
WORDS*, for SHORTER LOAD OPERATIONS SUBTRACT 0.5 μsec per
(16 bit) word, i.e., 17 μsec to 0.5 μsec for single word.
*NOTE:
In the unusual case where a superceding transmit command on the redundant
bus occurs at the returned status time for a valid 32 word receive,
simultaneously with an I/0 transfer request, the DONE interrupt may be
delayed for an additional 16.5 usec.
BUFF EF
This flag may be used to speed up read data operation in response to an I/0
load OUTPUT FIFO buffer command. The BUFF EF flag will go high when the
first word is loaded into the OUTPUT FIFO buffer. The word may be read at
that time. Please see Figure 6.
MODERESET
Indicates reception of a valid RESET mode command.
Table 6 – Discrete Interrupts Summary
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