
68HC912DG128 Rev 1.0
MOTOROLA
Clock Functions
139
Clock Functions
Clock Functions
Contents
Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .139
Clock Sources. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .140
Phase-Locked Loop (PLL) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .141
Acquisition and Tracking Modes . . . . . . . . . . . . . . . . . . . . . . . . . . . .143
Limp-Home and Fast STOP Recovery modes . . . . . . . . . . . . . . . . .145
System Clock Frequency formulas . . . . . . . . . . . . . . . . . . . . . . . . . .157
Clock Divider Chains. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .158
Computer Operating Properly (COP) . . . . . . . . . . . . . . . . . . . . . . . .162
Real-Time Interrupt . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .163
Clock Monitor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .163
Clock Function Registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .164
Introduction
Clock generation circuitry generates the internal and external E-clock
signals as well as internal clock signals used by the CPU and on-chip
peripherals. A clock monitor circuit, a computer operating properly
(COP) watchdog circuit, and a periodic interrupt circuit are also
incorporated into the 68HC(9)12DG128.
1-clock