參數(shù)資料
型號(hào): 5962R0150202VYX
元件分類: 微控制器/微處理器
英文描述: 16-BIT, 16 MHz, RISC PROCESSOR, QFP132
封裝: FP-132
文件頁(yè)數(shù): 32/53頁(yè)
文件大?。?/td> 458K
代理商: 5962R0150202VYX
38
When a RISC instruction specifies a long-word destination, a
32-bit result is always stored in the destination. If the RISC
instruction specifies a 5-bit literal source operand, then the
UT1750AR sign-extends this source data to produce a 32-bit
operand. If the RISC instruction specifies a word-length source
operand, then the UT1750AR also sign-extends this source data
to produce a 32-bit operand. If the RISC instruction specifies a
long-word-length source operand, there is no manipulation of
the source data.
When the system programmer specifies a byte instruction, the
UT1750AR only stores eight bits of the result regardless of
whether the RISC instruction specifies a word or long-word
destination register.
Operation Code Matrix
The UT1750AR performs 30 basic operations, each with its own
operation code. All the UT1750AR’s operations are explicit,
and are encoded in bits 14 through 10 of the RISC instruction
(figure 32; see page 35). A list of the UT1750AR’s opcodes are
in table 6.
Instruction Clock Cycles
The number of processor clock cycles the UT1750AR requires
to execute each of its instructions is in table 7. Table 7 specifies,
for each instruction, the execution time for the three instruction
types (Register-to-Register, Register-Literal, and Register-to-
Long Immediate) where applicable.
ABSOLUTE MAXIMUM RATINGS (1)
(Referenced to VSS)
SYMBOL
PARAMETER
LIMITS
UNIT
V
I
T
I
DD
I/O
I
STG
LU
DC supply voltage
Voltage on any pin
DC input current
Storage temperature
Latchup immunity (2)
-0.3 to +7.0
-0.3 to VDD+0.3
-65 to +150
150
+
-
V
mA
°C
mA
Notes:
2. See discussion of test technique (figure 43).
1. Stresses outside the listed absolute maximum ratings may cause permanent damage to the device. This is a stress rating only, and
functional operation of the device at these or any other conditions beyond limits indicated in the operational sections of this
specification is not recommended. Exposure to absolute maximum rating conditions for extended periods may affect device
reliability.
P
T
Θ
D
J
JC
Maximum power dissipation
Maximum junction temperature
Thermal resistance, junction-to-case (3)
600
+175
10
mW
°C
3. Test per MIL-STD-883, Method 1012.
°C/W
+10
RECOMMENDED OPERATING CONDITIONS
SYMBOL
PARAMETER
LIMITS
UNIT
V
T
DD
C
DC supply voltage
Temperature range
4.5 to 5.5
-55 to +125
V
°C
V
IN
DC input voltage
0 to VDD
V
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