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參數(shù)資料
| 型號： | 5962R0150201VYC |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 32-BIT, 12 MHz, RISC PROCESSOR, CPGA144 |
| 封裝： | CERAMIC, PGA-144 |
| 文件頁數(shù)： | 4/55頁 |
| 文件大?。?/td> | 685K |
| 代理商： | 5962R0150201VYC |
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All user-definable interrupts are available when the UT1750AR
is operating as a RISC. In addition, the system programmer can
read or write to virtually all of the UT1750AR’s internal
registers, either general purpose or specialized, when the
UT1750AR is in the RISC mode by using the Internal I/O
command (INR) or the Output Register command (OTR),
respectively.
The 1750A Mode of Operation
The configuration for the UT1750AR in the MIL-STD-1750A
mode of operation is shown in figure 5. The UT1750AR enters
the 1750 mode of operation when the mode input, M1750, is
pulled high.
The functional operation of the UT1750AR in the MIL-STD-
1750 mode is similar to the RISC mode of operation, although
it has two important differences. The first difference is that when
the system designer selects the MIL-STD-1750 mode, the
UT1750AR requires a specific set of RISC PROMs specially
programmed to allow the UT1750AR to emulate the 1750 ISA.
This special set of RISC PROMs contains a set of RISC-coded
macros that allow the UT1750AR to serve as a full-feature MIL-
STD-1750A microprocessor. In this respect, the RISC PROMs
hold external microcode, or “Mili”-code. This “Mili”-code tells
the UT1750AR how to function as a 1750 processor and, if
necessary, the user can change the “Mili”-code if the application
requires additional capability for real-time processing.
The second difference between the operation of the UT1750AR
in the 1750 mode and the RISC mode is that in the 1750 mode
the RISC address bus is limited to 16 address lines or 64K words
instead of the UT1750AR’s 20-bit RISC address bus in the RISC
mode. When in the 1750 mode, the UT1750AR uses the four
most significant bits of the RISC address bus for output
discretes. The output discrete that replaces the most significant
address bit (RA19) is a dedicated chip select.
RISC
DATA
RISC
ADD
16
20
M1750
USER-
DEFINED
SYSTEM
INTERRUPTS
8
UART
I/F
X
C
V
R
GENERAL
PURPOSE
MEMORY
I/O
DEVICE #1
I/O
DEVICE #2
BUS
ARBITER
DMA
DEVICE
#1
1553
I/F
DMA
DEVICE
#2
OP ADD
OP DATA
CONTROL
BRQ
BGNT
BUSY
BGACK
16
6
Figure 4. The UT1750AR in the RISC Mode of Operation
4
UT1750AR
RISC INSTRUCTION MEMORY
CAN ONLY BE ACCESSED
BY THE UT1750AR
OE
WE
RISC
MEMORY
1M X 16
(MAX)
INTERNALLY
PULLED LOW
SERIAL I/O
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| 5962R0722701VZA | 功能描述:模數(shù)轉(zhuǎn)換器 - ADC 8-Ch 50 kSPS-1 MSPS RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 結(jié)構(gòu):Sigma-Delta 轉(zhuǎn)換速率:125 SPs to 8 KSPs 分辨率:24 bit 輸入類型:Differential 信噪比:107 dB 接口類型:SPI 工作電源電壓:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:VQFN-32 |
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