參數(shù)資料
型號(hào): 5962-8987705JA
廠商: MAXIM INTEGRATED PRODUCTS INC
元件分類: Buffer和線驅(qū)動(dòng)
英文描述: TRIPLE LINE TRANSCEIVER, CDIP24
封裝: 0.300 INCH, CERDIP-24
文件頁(yè)數(shù): 2/15頁(yè)
文件大?。?/td> 1575K
代理商: 5962-8987705JA
10
Maxim Integrated
40Mbps, +3.3V, RS-485 Half-Duplex
Transceivers
MAX14840E/MAX14841E
Pin Configurations
Pin Descriptions
A
GND
DI
1
2
8
7
VCC
B
RE
DE
RO
SO
3
4
6
5
MAX14840E
MAX14841E
1
3
4
8
6
5
VCC
A
GND
*EP
*CONNECT EXPOSED PAD (EP) TO GND.
MAX14840E
MAX14841E
2
7
B
RO
+
DE
DI
RE
TDFN
TOP VIEW
PIN
NAME
FUNCTION
1
RO
Receiver Output. See the Function Table.
2
RE
Active-Low Receiver-Output Enable. Drive RE low to enable RO. RO is high impedance when RE is high.
Drive RE high and DE low to enter low-power shutdown mode. RE is a hot-swap input (see the Hot-Swap
Capability section for details).
3
DE
Driver-Output Enable. Drive DE high to enable driver outputs. These outputs are high impedance when
DE is low. Drive RE high and DE low to enter low-power shutdown mode. DE is a hot-swap input (see the
Hot-Swap Capability section for details).
4
DI
Driver Input. With DE high, a low on DI forces the A output low and the B output high. Similarly, a high on
DI forces the A output high and the B output low.
5
GND
Ground
6
A
Noninverting Receiver Input and Noninverting Driver Output
7
B
Inverting Receiver Input and Inverting Driver Output
8
VCC
Positive Supply Voltage Input. Bypass VCC with a 0.1FF ceramic capacitor to GND.
EP
Exposed Pad (TDFN Only). Connect EP to GND.
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