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Base Timer Options
Base timer overflow signal: Selects the base timer basic frequency.
1: DIVIN divided by 8192 or 32768, 2: DIVIN divided by 4096 or 16384
Serial Interface Options
SIO counter internal clock speed: Selects the frequency of the internal clock used by the serial interface.
1: 1 machine cycle, 2: 2 machine cycles, 3: 4 machine cycles
INT Pin Options
INT pin resistor: Selects the type of INT pin input circuit appropriate for the application
1: Pulled down, 2: Pulled up, 3: Open
INT pin interrupt edge: Selects the input level at which the INT external interrupt pin operates.
1: Falling edge (high to low), 2: Rising edge (low to high)
INT pin hold transistor: Selects whether or not the level hold function built into the INT pin circuit is used.
1: Low/high level hold transistor used, 2: Low/high level hold transistor unused
Reset Options
RESET pin resistor: Selects the type of RES pin input circuit appropriate for the application
1: Pulled down (high resistance), 2 Pulled up (low resistance), 3: Open (high resistance), 4: Open (low resistance)
Internal reset: Selects whether or not the internal reset circuit should be used in conjunction with the external reset
function.
1: Used, 2: Unused
Port Internal Resistor Options
Resistor connection selection: Selects the programmable resistors and the level hold functions that are built into the
input ports.
1. Pull-down resistor, 2: Pull-up resistor
Port Built-in Level Hold Function Options (Selected in 4-bit units): These depend on which of the above-described
options were selected.
Port S hold transistor: Selects whether or not the port S level hold function is used.
1: Low/high level hold transistors used, 2: Low/high level hold transistors unused
Port K hold transistors: Selects whether or not the port K level hold function is used.
1: Low/high level hold transistors used, 2: Low/high level hold transistors unused
Port M hold transistors: Selects whether or not the port M level hold function is used.
1: Low/high level hold transistors used, 2: Low/high level hold transistors unused
Port P hold transistors: Selects whether or not the port P level hold function is used.
1: Low/high level hold transistors used, 2: Low/high level hold transistors unused
Port SO hold transistors: Selects whether or not the port SO level hold function is used.
1: Low/high level hold transistors used, 2: Low/high level hold transistors unused
Port N Options
N1 pin output type: Selects the type of the port N1 output circuit.
1: CMOS type, 2: N-channel type
N2 pin output type: Selects the type of the port N2 output circuit.
1: CMOS type, 2: N-channel type
N3 pin output type: Selects the type of the port N3 output circuit.
1: CMOS type, 2: N-channel type
N4 pin output type: Selects the type of the port N4 output circuit.
1: CMOS type, 2: N-channel type
Port N initial output state: Selects the output levels for port N (N1 through N4) when the reset signal is applied.
1: High level or off, 2: Low level
No. 6008-7/15
LC587208A, 587206A, 587204A, 587202A