參數(shù)資料
型號： 587206A
英文描述： CMOS IC 4-Bit Single-Chip Microcontroller
中文描述： CMOS集成電路4位單片機
文件頁數(shù)： 10/15頁
文件大?。?/td> 163K
代理商： 587206A
No. 6008-10/15
LC587208A, 587206A, 587204A, 587202A
Parameter
Symbol
Conditions and applicable pins
Ratings
Unit
min
typ
max
V
DD
V
DD
1
V
DD
2
V
I
1
–0.3
+7.0
V
Maximum supply voltage
–0.3
V
DD
V
DD
V
–0.3
V
Maximum input voltage
Allowable levels in the specified circuit. XTIN, CFIN
S1 to 4, K1 to 4, P1 to 4, SO1 to 4, RES, INT, TST
(With the K, P, M, and SO ports in input mode)
Voltages up to the generated voltage are allowed.
V
I
2
–0.3
V
DD
+ 0.3
V
V
O
1
Allowable levels in the specified circuit. XTOUT, CFOUT
Voltages up to the generated voltage are allowed.
K1 to 4, P1 to 4, SO1 to 4, N1 to 4, CUP1, CUP2,
Seg1 to 23, COM1 to 4
(With the K, P, M, and SO ports in output mode)
–0.3
V
DD
+ 0.3
V
Maximum output voltage
V
O
2
V
O
3
I
O
1
I
O
2
I
O
3
I
O
4
∑
∑
I
O
1
∑
∑
I
O
2
Pd max
With the open-drain specifications N1 o 4 (Nch)
–0.3
+16
V
0
+10
mA
–10
0
mA
Pin output current
Per pin. K1 to 4, P1 to 4, M1 to 4, SO1 to 4
0
5
mA
–5
0
mA
Total current for all pins:
K1 to 4, P1 to 4, M1 to 4, SO1 to 4
N1 to 4, Seg1 to 35
40
mA
–40
mA
Allowable power dissipation
QFP64E(QIP64E) flat package
300
mW
Operating temperature
Topr
–30
+70
°C
Storage temperature
Allowable Operating Ranges
at Ta = –30 to +70°C, V
SS
= 0 V
Tstg
–55
+125
°C
Specifications
Absolute Maximum Ratings
at Ta = 25°C, V
SS
= 0 V
Parameter
Symbol
Conditions and applicable pins
Ratings
Unit
min
typ
max
LCD unused specifications: V
DD
1 = V
DD
2 = V
DD
Static drive specifications: V
DD
1 = V
DD
2 = V
DD
1/2 bias specifications: V
DD
1 = V
DD
2
≈
1/2V
DD
1/3 bias specifications: V
DD
1
≈
2
×
1/3V
DD
, V
DD
2
≈
1/3V
DD
Voltages at which the RAM and register contents are retained
*
2.0
6.0
V
Supply voltage
V
DD
2.0
6.0
V
2.8
6.0
V
2.8
6.0
V
Memory retention supply voltage
V
HD
2.0
V
DD
V
High-level input voltage
V
IH
1
S1 to 4, K1 to 4, P1 to 4, M1 to 4, SO1 to 4, INT
(With the K, P, M, and SO ports in input mode)
0.7 V
DD
V
DD
V
Low-level input voltage
V
IL
1
S1 to 4, K1 to 4, P1 to 4, M1 to 4, SO1 to 4, INT
(With the K, P, M, and SO ports in input mode)
0
0.3 V
DD
V
High-level input voltage
V
IH
2
V
IL
2
V
IH
3
V
IL
3
fopg1
RES
0.75 V
DD
V
DD
V
Low-level input voltage
RES
0
0.25 V
DD
V
High-level input voltage
CFIN
0.75 V
DD
V
DD
V
Low-level input voltage
CFIN
0
0.25 V
DD
V
Operating frequency 1
V
DD
= 2.0 V to 6.0 V, XTIN/XOUT, 32 kHz Crystal oscillator
V
DD
= 2.2 V to 6.0 V, XTIN/XOUT, 38 kHz Crystal oscillator
V
DD
= 2.2 V to 6.0 V, XTIN/XOUT, 65 kHz Crystal oscillator
V
DD
= 2.2 V to 6.0 V CFIN, CFOUT CF specifications
V
DD
= 2.5 V to 6.0 V CFIN, CFOUT CF specifications
V
DD
= 2.8 V to 6.0 V CFIN, CFOUT CF specifications
V
DD
= 4.5 V to 6.0 V CFIN, CFOUT CF specifications
V
DD
= 4.5 V to 6.0 V CFIN, CFOUT RC specifications
V
DD
= 3.0 V to 6.0 V CFIN, CFOUT EXT specifications
V
DD
= 3.0 V to 6.0 V
Pins SO1 and SO3 (in serial interface mode)
Rising and falling edges on the input signal and clock
waveform must be
≤
10 μs
32
33
kHz
Operating frequency 2
fopg2
37
39
kHz
Operating frequency 3
fopg3
60
70
kHz
Operating frequency 4
fopg4
390
810
kHz
Operating frequency 5
fopg5
390
1200
kHz
Operating frequency 6
fopg6
390
4200
kHz
Operating frequency 7
fopg7
390
6000
kHz
Operating frequency 8
fopg8
400
800
kHz
Operating frequency 9
fopg9
190
4000
kHz
Operating frequency 10
fopg10
DC
200
kHz
Note
*
: The state where the CF/RC and crystal oscillators are completely stopped, and all internal circuits completely stopped.
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