- 您現(xiàn)在的位置：買(mǎi)賣(mài)IC網(wǎng) > PDF目錄360257 > 56F802 (飛思卡爾半導(dǎo)體(中國(guó))有限公司) 16-bit Digital Signal Controllers PDF資料下載
參數(shù)資料
| 型號(hào)： | 56F802 |
| 廠商： | 飛思卡爾半導(dǎo)體(中國(guó))有限公司 |
| 英文描述： | 16-bit Digital Signal Controllers |
| 中文描述： | 16位數(shù)字信號(hào)控制器 |
| 文件頁(yè)數(shù)： | 23/40頁(yè) |
| 文件大?。?/td> | 2472K |
| 代理商： | 56F802 |
第1頁(yè)第2頁(yè)第3頁(yè)第4頁(yè)第5頁(yè)第6頁(yè)第7頁(yè)第8頁(yè)第9頁(yè)第10頁(yè)第11頁(yè)第12頁(yè)第13頁(yè)第14頁(yè)第15頁(yè)第16頁(yè)第17頁(yè)第18頁(yè)第19頁(yè)第20頁(yè)第21頁(yè)第22頁(yè)當(dāng)前第23頁(yè)第24頁(yè)第25頁(yè)第26頁(yè)第27頁(yè)第28頁(yè)第29頁(yè)第30頁(yè)第31頁(yè)第32頁(yè)第33頁(yè)第34頁(yè)第35頁(yè)第36頁(yè)第37頁(yè)第38頁(yè)第39頁(yè)第40頁(yè)
Clock Operation
56F802 Technical Data, Rev. 7
Freescale Semiconductor
23
3.5 Clock Operation
The 56F802 device clock is derived from an on-chip relaxation oscillator. The internal PLL generates a
master reference frequency that determines the speed at which chip operations occur.
The PRECS bit in the PLLCR (phase-locked loop control register) word (bit 2) must be set to 0 for internal
oscillator use.
3.5.1
The 56F802 internal relaxation oscillator provides the chip clock without the need for an external crystal
or ceramic resonator. The frequency output of this internal oscillator can be corrected by adjusting the 8-bit
IOSCTL (internal oscillator control) register. Each bit added or deleted changes the output frequency of
the oscillator allowing incremental adjustment until the desired frequency is achieved. Figures 9 and 10
show the typical characteristics of the 56F802 relaxation oscillator with respect to temperature and trim
value.
Use of On-Chip Relaxation Oscillator
During factory production test, an oscillator calibration procedure is executed which determines an
optimum trim value for a given device (8MHz at 25
o
C). This optimum trim value is then stored at address
$103F in the Data Flash Information Block and recalled during a trim routine in the boot sequence
(executed after power-up and RESET). This trim routine automatically sets the oscillator frequency by
programming the IOSCTL register with the optimum trim value.
Due to the inherent frequency tolerances required for SCI communication, changing the factory-trimmed
oscillator frequency is not recommended. If modification of the Boot Flash contents are required, code
must be included which retrieves the optimum trim value (from address $103F in the Data Flash
Information Block) and writes it to the IOSCTL register. Note that the IFREN bit in the Data Flash control
register must be set in order to read the Data Flash Information Block.
Table 3-8 Relaxation Oscillator Characteristics
Operating Conditions:
V
SS
= V
SSA
= 0 V, V
DD
= V
DDA
= 3.0–3.6 V, T
A
= –40
°
to +85
°
C
Characteristic
Symbol
Min
Typ
Max
Unit
Frequency Accuracy
1
1.
Over full temperature range.
f
—
+2
+5
%
Frequency Drift over Temp
f/
t
—
+0.1
—
%/
o
C
Frequency Drift over Supply
f/
V
—
0.1
—
%/V
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| 57037 | PNT MRKING LYT BLUE INK 1LTR |
| 5703AY | Single Digit LED Numeric Display |
| 5301AHR | Dual/Triple Ultra-Low-Voltage SOT23 µP Supervisory Circuits |
| 5301AP | Single Digit LED Numeric Display |
| 5303AHR | Single Digit LED Numeric Display |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| 56F802_07 | 制造商:FREESCALE 制造商全稱:Freescale Semiconductor, Inc 功能描述:16-bit Digital Signal Controllers |
| 56F8023 | 制造商:FREESCALE 制造商全稱:Freescale Semiconductor, Inc 功能描述:16-bit Digital Signal Controllers |
| 56F8023_07 | 制造商:FREESCALE 制造商全稱:Freescale Semiconductor, Inc 功能描述:16-bit Digital Signal Controllers |
| 56F8025 | 制造商:FREESCALE 制造商全稱:Freescale Semiconductor, Inc 功能描述:16-bit Digital Signal Controllers |
| 56F8025_07 | 制造商:FREESCALE 制造商全稱:Freescale Semiconductor, Inc 功能描述:16-bit Digital Signal Controllers |
發(fā)布緊急采購(gòu)，3分鐘左右您將得到回復(fù)。