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參數(shù)資料
| 型號(hào)： | 2SK3775-01 |
| 廠商： | FUJI ELECTRIC CO LTD |
| 元件分類： | JFETs |
| 英文描述： | N-CHANNEL SILICON POWER MOSFET |
| 中文描述： | 2.4 A, 300 V, 0.13 ohm, N-CHANNEL, Si, POWER, MOSFET |
| 文件頁(yè)數(shù)： | 1/4頁(yè) |
| 文件大?。?/td> | 93K |
| 代理商： | 2SK3775-01 |
1
Item
Drain-source voltage
Symbol
V
DS
V
DSX
I
D
Ratings
300
300
±32
±2.4
±128
±30
32
597.4
Unit Remarks
V
V
A
A
A
V
A
mJ
Note *3
Continuous Drain Current
Pulsed Drain Current
Gate-Source Voltage
Maximum Avalanche current
Non-Repetitive
Maximum Avalanche Energy
Repetitive
Maximum Avalanche Energy
Maximum Drain-Source dV/dt
Peak Diode Recovery dV/dt
Max. Power Dissipation
I
D(puls]
V
GS
I
AR
E
AS
E
AR
27
dV
DS
/dt
dV/dt
P
D
20
5
270
2.40
Operating and Storage
Temperature range
T
ch
T
stg
+150
-55 to +150
Electrical characteristics (T
c
=25°C unless otherwise specified)
Thermalcharacteristics
Item
2SK3775-01
FUJI POWER MOSFET
Super FAP-G Series
Features
High speed switching, Low on-resistance
Low driving power, Avalanche-proof
No secondary breadown
Applications
Switching regulators
UPS (Uninterruptible Power Supply)
DC-DC converters
Maximum ratings and characteristic
Absolute maximum ratings
(Tc=25°C unless otherwise specified)
Symbol Test Conditions
R
th(ch-c)
channel to case
R
th(ch-a)
channel to ambient
R
th(ch-a) *1
channel to ambient
Zero Gate Voltage Drain Current I
DSS
V
GS
=0V
V
GS
=0V
V
GS
=±30V
I
D
=16A V
GS
=10V
I
D
=16A V
DS
=25V
V
DS
=25V
V
GS
=0V
f=1MHz
V
CC
=180V I
D
=16A
V
GS
=10V
R
GS
=10
Min. Typ. Max. Units
300
3.0
V
V
μA
nA
S
pF
nC
V
ns
μC
ns
Min. Typ. Max. Units
Thermal resistance
0.463
87.0
52.0
°C/W
°C/W
°C/W
Symbol
BV
DSS
V
GS(th)
I
GSS
R
DS(on)
g
fs
C
iss
C
oss
C
rss
td
(on)
t
r
td
(off)
t
f
Q
G
Q
GS
Q
GD
V
SD
t
rr
Q
rr
Item
Drain-Source Breakdown Voltaget
Gate Threshold Voltage
Gate-Source Leakage Current
Drain-Source On-State Resistance
Forward Transcondutance
Input Capacitance
Output Capacitance
Reverse Transfer Capacitance
Turn-On Time t
on
Turn-Off Time t
off
Total Gate Charge
Gate-Source Charge
Gate-Drain Charge
Diode forward on-voltage
Reverse recovery time
Reverse recovery charge
Test Conditions
I
D
= 250μA V
GS
=0V
I
D
= 250μA V
DS
=V
GS
=300V V
ch
=25°C
=240V V
ch
=125°C
V
DS
=0V
V
CC
=150V
I
D
=32A
V
GS
=10V
I
F
=32A V
GS
=0V T
ch
=25°C
I
F
=32A V
GS
=0V
-di/dt=100A/μs T
ch
=25°C
mJ
kV/μs
kV/μs
W
°C
°C
5.0
25
250
100
0.13
0.10
24
1970
335
20
29
7.5
57
7
44.5
18.0
13.5
0.90
270
3.0
12
2955
502
30
44
11
86
10.5
67.0
27.0
20.5
1.50
Outline Drawings
(mm)
www.fujielectric.co.jp/fdt/scd
G : Gate
S2 : Source
D : Drain
S1 : Source
N-CHANNEL SILICON POWER MOSFET
Equivalent circuit schematic
*1 Surface mounted on 1000mm
2
, t=1.6mm FR-4 PCB(Drain pad area : 500mm
2
)
200406
F o o t P r i n t
V
GS
=-30V
Ta=25°C
Note *2
Note *4
V
DS
300V
Note *5
Tc=25°C
Ta=25°C Note*1
=
Note *1:Surface mounted on 1000mm
2
,t=1.6mm
FR-4 PCB(Drain pad area:500mm
2)
Note *2:Tch 150°C,Repetitive and Non-repetitive
Note *3:StartingTch=25°C,I
AS
=13A,L=6.13mH,
V
CC
=48V,R
G
=50
EAS limited by maximum channel temperature
and avalanch current.
See to the ‘Avalanche Energy’ graph
Note *4:Repetitive rating:Pulse width limited by
maximum channel temperature.
See to the ‘Transient Theemal impedance’
graph
=
Note *5:I
F
-I
D
, -di/dt=50A/
μ
s,V
CC
BV
DSS
,Tch 150°C
=
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