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參數資料
| 型號： | 2N5640RLRM |
| 廠商： | ON SEMICONDUCTOR |
| 元件分類： | 小信號晶體管 |
| 英文描述： | 30 V, N-CHANNEL, Si, SMALL SIGNAL, JFET, TO-92 |
| 封裝： | PLASTIC, TO-226AA, 3 PIN |
| 文件頁數： | 30/35頁 |
| 文件大?。?/td> | 353K |
| 代理商： | 2N5640RLRM |
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2N5640
4–133
Motorola Small–Signal Transistors, FETs and Diodes Device Data
r ds(on)
,DRAIN–SOURCE
ON–ST
A
T
E
RESIST
ANCE
(OHMS)
NOTE 2
The Zero–Gate–Voltage Drain Current (IDSS), is the principle
determinant of other J-FET characteristics. Figure 10 shows
the relationship of Gate–Source Off Voltage (VGS(off) and
Drain–Source On Resistance (rds(on)) to IDSS. Most of the
devices will be within
±10% of the values shown in Figure 10.
This data will be useful in predicting the characteristic
variations for a given part number.
y
fs
,FOR
W
ARD
TRANSFER
ADMITT
ANCE
(mmhos)
C,
CAP
ACIT
ANCE
(pF)
r ds(on)
,DRAIN–SOURCE
ON–ST
A
T
E
RESIST
ANCE
(OHMS)
r ds(on)
,DRAIN–SOURCE
ON–ST
A
T
E
RESIST
ANCE
(NORMALIZED)
2.0
3.0
5.0
7.0
10
20
0.5 0.7
1.0
2.0
3.0
5.0 7.0 10
20
30
50
ID, DRAIN CURRENT (mA)
Figure 6. Typical Forward Transfer Admittance
1.0
1.5
2.0
3.0
5.0
7.0
10
15
0.03 0.05
0.1
0.3 0.5
1.0
3.0 5.0
10
30
VR, REVERSE VOLTAGE (VOLTS)
Figure 7. Typical Capacitance
200
160
120
80
40
0
1.0
2.0
3.0
4.0
5.0
6.0
7.0
8.0
VGS, GATE–SOURCE VOLTAGE (VOLTS)
Figure 8. Effect of Gate–Source Voltage
On Drain–Source Resistance
2.0
1.8
1.6
1.4
1.2
1.0
0.8
0.6
0.4
– 70
– 40
– 10
20
50
80
110
140
170
Tchannel, CHANNEL TEMPERATURE (°C)
Figure 9. Effect of Temperature On
Drain–Source On–State Resistance
Tchannel = 25°C
VDS = 15 V
Cgs
Cgd
Tchannel = 25°C
(Cds IS NEGLIGIBLE)
IDSS
= 10
mA
25
mA
50 mA
75 mA 100 mA
125 mA
Tchannel = 25°C
ID = 1.0 mA
VGS = 0
10
IDSS, ZERO–GATE–VOLTAGE DRAIN CURRENT (mA)
Figure 10. Effect of IDSS On Drain–Source
Resistance and Gate–Source Voltage
20 30
40 50 60
70 80 90 100 110 120 130 140 150
10
9.0
8.0
7.0
6.0
5.0
4.0
3.0
2.0
1.0
0
100
90
80
70
60
50
40
30
20
10
0
V
GS
,GA
TE–SOURCE
VOL
TAGE
(VOL
TS)
Tchannel = 25°C
rDS(on) @ VGS = 0
VGS(off)
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