![](http://datasheet.mmic.net.cn/380000/-PD78F9801_datasheet_16745018/-PD78F9801_212.png)
APPENDIX C REGISTER INDEX
212
Port mode register 2 (PM2)....................................................................................................................................73
Port mode register 4 (PM4)....................................................................................................................................73
Port output mode register 0 (POM0)......................................................................................................................75
Port output mode register 1 (POM1)......................................................................................................................75
Processor clock control register (PCC)..................................................................................................................78
Pull-up resistor option register 0 (PU0)..................................................................................................................74
[R]
Receive data address (USBR0-USBR7)..............................................................................................................108
Receive data PID (USBRD) .................................................................................................................................108
Receive token packet address (USBRAL, USBRAH) ..........................................................................................108
Receive token PID (USBRTP)..............................................................................................................................108
Remote wake-up control register (REMWUP)......................................................................................................125
[S]
Send data bank 0 address (USBT00-USBT07)....................................................................................................109
Send data bank 1 address (USBT10-USBT17)....................................................................................................109
Send data PID bank 0 (USBTD0).........................................................................................................................109
Send data PID bank 1 (USBTD1).........................................................................................................................109
Send/receive pointer (USBPOW).........................................................................................................................107
Serial operation mode register 0 (CSIM10)..........................................................................................152, 153, 154
[T]
Timer clock select register 2 (TCL2) ......................................................................................................................99
Token address compare register (ADRCMP).......................................................................................................111
Token packet receive result store register (TRXRSL)..........................................................................................117
Token PID compare register (TIDCMP) ...............................................................................................................110
Transmit/receive shift register (SIO10).................................................................................................................150
[U]
USB receiver enable register (USBMOD) ............................................................................................................113
USB timer start reservation control register (USBTCL)........................................................................................124
[W]
Watchdog timer mode register (WDTM) ................................................................................................................99