![](http://datasheet.mmic.net.cn/380000/-PD784928Y_datasheet_16744934/-PD784928Y_217.png)
217
CHAPTER 6 INSTRUCTION SET
--0 0 1 1
←
Saddr1 Offset
→
--0 0 0 0
←
High Address
→
--------------------------------------------------------------------------------
←
Low Address
→
←
High Address
--0 0 0 0
←
High Address
→
--0 0 0 0
←
Low Address
→
←
High Address
Mnemonic
Operands
Operation Code
B1
B2
B3
B4
B5
B6
B7
ADD
[%saddrg2], A
0 0 0 0
0 1 1 1
1 0 1 1
1 0 0 0
←
Saddr2-offset
→
[%saddrg1], A
1 1 0 0
0 0 0 0
0 1 1 1
1 0 1 1
1 0 0 0
A, !addr16
1 0 1 0
0 1 0 0
1 0 0 0
←
Low Address
→
A, !!addr24
0 0 0 0
1 0 1 0
0 1 0 1
1 0 0 0
High-w Address
→
!addr16, A
1 0 1 0
1 1 0 0
1 0 0 0
←
Low Address
→
!!addr24, A
1 0 1 0
1 1 0 1
1 0 0 0
←
High-w Address
→
→
A, [TDE +]
0 0 0 1
0 1 1 0
0 0 0 0
1 0 0 0
A, [WHL +]
0 0 0 1
0 1 1 0
0 0 0 1
1 0 0 0
A, [TDE –]
0 0 0 1
0 1 1 0
0 0 1 0
1 0 0 0
A, [WHL –]
0 0 0 1
0 1 1 0
0 0 1 1
1 0 0 0
A, [TDE]
0 0 0 1
0 1 1 0
0 1 0 0
1 0 0 0
A, [WHL]
0 0 0 1
0 1 1 0
0 1 0 1
1 0 0 0
A, [VVP]
0 0 0 1
0 1 1 0
0 1 1 0
1 0 0 0
A, [UUP]
0 0 0 1
0 1 1 0
0 1 1 1
1 0 0 0
A, [TDE + byte]
0 0 0 0
0 1 1 0
0 0 0 0
1 0 0 0
←
Low Offset
→
A, [SP + byte]
0 0 0 0
0 1 1 0
0 0 0 1
1 0 0 0
←
Low Offset
→
A, [WHL + byte]
0 0 0 0
0 1 1 0
0 0 1 0
1 0 0 0
←
Low Offset
→
A, [UUP + byte]
0 0 0 0
0 1 1 0
0 0 1 1
1 0 0 0
←
Low Offset
→
A, [VVP + byte]
0 0 0 0
0 1 1 0
0 1 0 0
1 0 0 0
←
Low Offset
→
A, imm24 [DE]
0 0 0 0
--------------------------------------------------------------------------------
1 0 1 0
0 0 0 0
1 0 0 0
←
Low Offset
→
←
High Offset
→
←
High-w Offset
→
A, imm24 [A]
0 0 0 0
--------------------------------------------------------------------------------
1 0 1 0
0 0 0 1
1 0 0 0
←
Low Offset
→
←
High Offset
→
←
High-w Offset
→
A, imm24 [HL]
0 0 0 0
--------------------------------------------------------------------------------
1 0 1 0
0 0 1 0
1 0 0 0
←
Low Offset
→
←
High Offset
→
←
High-w Offset
→
A, imm24 [B]
0 0 0 0
--------------------------------------------------------------------------------
1 0 1 0
0 0 1 1
1 0 0 0
←
Low Offset
→
←
High Offset
→
←
High-w Offset
→
A, [TDE + A]
0 0 0 1
0 1 1 1
0 0 0 0
1 0 0 0
A, [WHL + A]
0 0 0 1
0 1 1 1
0 0 0 1
1 0 0 0
(Continued on next page)