![](http://datasheet.mmic.net.cn/380000/-PD784928Y_datasheet_16744934/-PD784928Y_209.png)
209
CHAPTER 6 INSTRUCTION SET
--------------------------------------------------------------------------------
←
High Offset
→
←
High-w Offset
--0 0 0 0
←
High Offset
→
←
High-w Offset
--0 0 1 1
←
Saddr1-offset
→
--0 0 1 1
←
Saddr1-offset
→
--0 0 1 1
←
High Byte
→
←
High-w Byte
--0 0 1 1
←
Low Address
→
←
High Address
--0 0 1 1
←
Low Address
→
←
High Address
(3) 24-bit data transfer instruction: MOVG
Mnemonic
Operands
Operation Code
B1
B2
B3
B4
B5
B6
B7
MOVG
rg, #imm24
1 0 0 0
1 G
6
G
5
1
1 0 1 1
←
Low Byte
→
→
rg, rg’
0 0 1 0
0 1 0 0
1 G
6
G
5
1
1 G
2
G
1
1
rg, !!addr24
1 1 1 0
1 G
6
G
5
1
1 0 1 0
←
High-w Address
→
→
!!addr24, rg
1 1 1 0
1 G
6
G
5
1
1 0 1 1
←
High-w Address
→
→
rg, saddrg2
0 0 1 1
1 0 0 0
1 G
6
G
5
1
1 0 0 0
←
Saddr2-offset
→
rg, saddrg1
0 0 1 1
1 0 0 0
1 G
6
G
5
1
1 0 0 1
←
Saddr1-offset
→
saddrg2, rg
0 0 1 1
1 0 0 0
1 G
6
G
5
1
1 1 0 0
←
Saddr2-offset
→
saddrg1, rg
0 0 1 1
1 0 0 0
1 G
6
G
5
1
1 1 0 1
←
Saddr1-offset
→
WHL, [%saddrg2]
0 0 0 0
0 1 1 1
0 0 1 1
0 0 1 0
←
Saddr2-offset
→
WHL, [%saddrg1]
1 1 0 0
0 0 0 0
0 1 1 1
0 0 1 1
0 0 1 0
[%saddrg2], WHL
0 0 0 0
0 1 1 1
1 0 1 1
0 0 1 0
←
Saddr2-offset
→
[%saddrg1], WHL
1 1 0 0
0 0 0 0
0 1 1 1
1 0 1 1
0 0 1 0
WHL, [TDE +]
0 0 0 1
0 1 1 0
0 0 0 0
0 0 1 0
WHL, [TDE –]
0 0 0 1
0 1 1 0
0 0 1 0
0 0 1 0
WHL, [TDE]
0 0 0 1
0 1 1 0
0 1 0 0
0 0 1 0
WHL, [WHL]
0 0 0 1
0 1 1 0
0 1 0 1
0 0 1 0
WHL, [VVP]
0 0 0 1
0 1 1 0
0 1 1 0
0 0 1 0
WHL, [UUP]
0 0 0 1
0 1 1 0
0 1 1 1
0 0 1 0
WHL, [TDE + byte]
0 0 0 0
0 1 1 0
0 0 0 0
0 0 1 0
←
Low Offset
→
WHL, [SP + byte]
0 0 0 0
0 1 1 0
0 0 0 1
0 0 1 0
←
Low Offset
→
WHL, [WHL + byte]
0 0 0 0
0 1 1 0
0 0 1 0
0 0 1 0
←
Low Offset
→
WHL, [UUP + byte]
0 0 0 0
0 1 1 0
0 0 1 1
0 0 1 0
←
Low Offset
→
WHL, [VVP + byte]
0 0 0 0
0 1 1 0
0 1 0 0
0 0 1 0
←
Low Offset
→
WHL, imm24 [DE]
0 0 0 0
1 0 1 0
0 0 0 0
0 0 1 0
Low Offset
→
WHL, imm24 [A]
1 0 1 0
0 0 0 1
0 0 1 0
←
Low Offset
→
→
(Continued on next page)