
m
PD784054
4
CONTENTS
1.
DIFFERENCES BETWEEN
m
PD784054 AND
m
PD784046 SUBSERIES........................................ 6
2.
PIN CONFIGURATION (Top View).................................................................................................... 7
3.
SYSTEM CONFIGURATION EXAMPLE (PPC) ................................................................................ 9
4.
BLOCK DIAGRAM ........................................................................................................................... 10
5.
PIN FUNCTIONS .............................................................................................................................. 11
5.1
Port Pins .................................................................................................................................................... 11
5.2
Pins Other Than Port Pins ...................................................................................................................... 13
5.3
I/O Circuits of Pins and Processing of Unused Pins.......................................................................... 15
6.
CPU ARCHITECTURE ..................................................................................................................... 17
6.1
Memory Space .......................................................................................................................................... 17
6.2
CPU Registers........................................................................................................................................... 19
6.2.1
General-purpose registers ............................................................................................................. 19
6.2.2
Control registers ............................................................................................................................. 20
6.2.3
Special function registers (SFRs).................................................................................................. 21
7.
PERIPHERAL HARDWARE FUNCTIONS ...................................................................................... 26
7.1
Ports ........................................................................................................................................................... 26
7.2
Clock Generation Circuit......................................................................................................................... 27
7.3
Timer .......................................................................................................................................................... 29
7.4
A/D Converter ........................................................................................................................................... 31
7.5
Serial Interface.......................................................................................................................................... 32
7.5.1
Asynchronous serial interface/3-wire serial I/O (UART/IOE) ....................................................... 33
7.6
Edge Detection Circuit ............................................................................................................................ 35
7.7
Watchdog Timer........................................................................................................................................ 35
8.
INTERRUPT FUNCTION .................................................................................................................. 36
8.1
Interrupt Source ....................................................................................................................................... 36
8.2
Vectored Interrupt .................................................................................................................................... 38
8.3
Context Switching .................................................................................................................................... 39
8.4
Macro Service ........................................................................................................................................... 40
9.
LOCAL BUS INTERFACE................................................................................................................ 43
9.1
Memory Expansion .................................................................................................................................. 44
9.2
Memory Space .......................................................................................................................................... 45
9.3
Programmable Wait.................................................................................................................................. 45
9.4
Bus Sizing Function................................................................................................................................. 45