參數(shù)資料
型號(hào)： μPD784054
廠商： NEC Corp.
英文描述： 16 Bit Single Chip Microcontrollers(16位單片微控制器)
中文描述： 16位單片機(jī)微控制器（16位單片微控制器）
文件頁(yè)數(shù)： 37/60頁(yè)
文件大?。?/td> 349K
代理商： ΜPD784054
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PD784054
3 7
Table 8-2. Interrupt Sources
Type
Default
Source
Internal/
Macro
Priority
Name
Trigger
External
Service
Software
–
BRK instruction
Execution of instruction
–
–
Operand error
If result of exclusive OR of operands byte and byte
is not FFH when MOV STBC, #byte or MOV WDM,
#byte instruction is executed
Non-
–
NMI
Detection of pin input edge
External
maskable
INTWDT
Overflow of watchdog timer
Internal
Maskable
0 (highest)
INTOV0
Overflow of timer 0
1
INTOV1
Overflow of timer 1
2
INTOV4
Overflow of timer 4
3
INTP0
Detection of pin input edge (CC00 capture trigger)
External
INTCC00
Generation of TM0-CC00 coincidence signal
Internal
4
INTP1
Detection of pin input edge (CC01 capture trigger)
External
INTCC01
Generation of TM0-CC01 coincidence signal
Internal
5
INTP2
Detection of pin input edge (CC02 capture trigger)
External
INTCC02
Generation of TM0-CC02 coincidence signal
Internal
6
INTP3
Detection of pin input edge (CC03 capture trigger)
External
INTCC03
Generation of TM0-CC03 coincidence signal
Internal
7
INTP4
Detection of pin input edge
(A/D converter conversion start trigger)
External
8
INTP5
Detection of pin input edge
9
INTP6
Detection of pin input edge
10
INTCM10
Generation of TM1-CM10 coincidence signal
Internal
11
INTCM11
Generation of TM1-CM11 coincidence signal
12
INTCM40
Generation of TM4-CM40 coincidence signal
13
INTCM41
Generation of TM4-CM41 coincidence signal
14
INTSER
Occurrence of UART0 reception error
15
INTSR
End of UART0 reception
INTCSI1
End of 3-wire serial I/O1 transfer
16
INTST
End of UART0 transfer
17
INTSER2
Occurrence of UART2 reception error
18
INTSR2
End of UART2 reception
INTCSI2
End of 3-wire serial I/O2 transfer
19
INTST2
End of UART2 transfer
INTAD
End of A/D converter conversion (transfer to ADCR)
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