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CHAPTER 15 SERIAL INTERFACE CHANNEL 0 (
μ
PD78018F SUBSERIES)
1
2
3
4
5
6
7
8
SCK0
D7
D6
D5
D4
D3
D2
D1
D0
SB0(SB1)
CSIIF0
Transfer starts in synchronization with falling edge of SCK0
Transfer ends
(2) Communication operation
In the 2-wire serial I/O mode, data is transmitted/received in 8-bit units. Data is transmitted/received on a
1-bit-by-1-bit basis in synchronization with the serial clock.
The shift operation of the serial I/O shift register 0(SIO0) is performed in synchronization with the falling edge
of the serial clock (SCK0). The transmitted data is retained by the SO0 latch and output from the SB0/P25
(or SB1/P26) pin, starting from the MSB. The received data input from the SB0 (or SB1) pin is latched to the
SIO0 at the rising edge of SCK0.
When the 8-bit data has been completely transferred, the operation of the SIO0 is automatically stopped, and
an interrupt request flag (CSIIF0) is set.
Figure 15-31. Timing of 2-Wire Serial I/O Mode
The SB0 (or SB1) pin specified as the serial data bus must be externally pulled up because this pin is an N-
ch open drain I/O pin. When data is received, write FFH to SIO0 in advance because the N-ch open-drain
output must be made high-impedance state.
Because the SB0 (or SB1) pin outputs the status of the SO0 latch, the output status of the SB0 (or SB1) pin
can be manipulated by setting the bit 0 (RELT) and bit 1 (CMDT) of serial bus interface control register (SBIC).
However, do not manipulate the output status of the pin during serial transfer.
The output level of the SCK0 pin is controlled by manipulating the P27 output latch in the output mode (mode
of the internal system clock) (refer to
15.4.5 Manipulating SCK0/P27 pin output
).