23
12-3.
12-4.
Timer Clock Select Register 0 Format................................................................................
Port Mode Register 3 Format .............................................................................................
251
252
13-1.
13-2.
13-3.
Buzzer Output Control Circuit Block Diagram ....................................................................
Timer Clock Select Register 2 Format................................................................................
Port Mode Register 3 Format .............................................................................................
253
255
256
14-1.
14-2.
14-3.
14-4.
14-5.
14-6.
14-7.
14-8.
14-9.
14-10.
14-11.
A/D Converter Block Diagram ............................................................................................
A/D Converter Mode Register Format ................................................................................
A/D Converter Input Select Register Format ......................................................................
External Interrupt Mode Register 1 Format ........................................................................
A/D Converter Basic Operation ..........................................................................................
Relationships Between Analog Input Voltage and A/D Conversion Result.........................
A/D Conversion by Hardware Start ....................................................................................
A/D Conversion by Software Start......................................................................................
Example of Method of Reducing Current Consumption in Standby Mode .........................
Analog Input Pin Disposition ..............................................................................................
A/D Conversion End Interrupt Request Generation Timing................................................
258
262
263
264
266
267
268
269
270
271
272
15-1.
15-2.
15-3.
D/A Converter Block Diagram ............................................................................................
D/A Converter Mode Register Format ................................................................................
Use Example of Buffer Amplifier.........................................................................................
274
276
278
16-1.
16-2.
16-3.
16-4.
16-5.
16-6.
16-7.
16-8.
16-9.
16-10.
16-11.
16-12.
16-13.
16-14.
16-15.
16-16.
16-17.
16-18.
16-19.
16-20.
16-21.
Serial Bus Interface (SBI) System Configuration Example ................................................
Serial Interface Channel 0 Block Diagram .........................................................................
Timer Clock Select Register 3 Format................................................................................
Serial Operating Mode Register 0 Format..........................................................................
Serial Bus Interface Control Register Format.....................................................................
Interrupt Timing Specify Register Format ...........................................................................
3-wire Serial I/O Mode Timings ..........................................................................................
RELT and CMDT Operations..............................................................................................
Circuit of Switching in Transfer Bit Order ...........................................................................
Example of Serial Bus Configuration with SBI ...................................................................
SBI Transfer Timings ..........................................................................................................
Bus Release Signal ............................................................................................................
Command Signal ................................................................................................................
Addresses...........................................................................................................................
Slave Selection with Address .............................................................................................
Commands .........................................................................................................................
Data ....................................................................................................................................
Acknowledge Signal ...........................................................................................................
BUSY and READY Signals.................................................................................................
RELT, CMDT, RELD, and CMDD Operations (Master).......................................................
RELD and CMDD Operations (Slave) ................................................................................
281
283
287
288
290
292
297
297
298
299
301
302
302
303
303
304
304
305
306
311
311
LIST OF FIGURES (4/8)
Figure No.
Title
Page