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參數(shù)資料
| 型號： | μPD72862 |
| 廠商： | NEC Corp. |
| 英文描述： | IEEE1394 OHCI Host Controller(IEEE1394 主控制器) |
| 中文描述： | IEEE1394連接OHCI主機控制器（IEEE1394連接主控制器） |
| 文件頁數(shù)： | 8/36頁 |
| 文件大?。?/td> | 194K |
| 代理商： | ΜPD72862 |
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Data Sheet S14265EJ2V0DS00
8
μ
PD72862
1. PIN FUNCTIONS
1.1 PCI Bus Interface Signals: (52 pins)
(1/2)
Name
I/O
Pin No.
I
OL
Volts(V)
Function
PAR
I/O
18
PCI/Cardbus
5/3.3
Parity
is even parity across AD0-AD31 and CBE0-CBE3. It is an
input when AD0-AD31 is an input; it is an output when AD0-AD31 is
an output.
AD0-AD31
I/O
2-5, 7, 8,
21-24,
27-30,
33-36,
39-42,
86-91,
93, 94,
98, 99
PCI/Cardbus
5/3.3
PCI Multiplexed Address and Data
CBE0-CBE3
I
9, 20,
32, 95
-
5/3.3
Command/Byte Enables
are multiplexed Bus Commands & Byte
enables.
FRAME
I/O
10
PCI/Cardbus
5/3.3
Cycle Frame
is asserted by the initiator to indicate the cycle
beginning and is kept asserted during the burst cycle.
If Cardbus mode (CARD_ON = 1), this pin is should be pulled up to
V
DD
.
TRDY
I/O
13
PCI/Cardbus
5/3.3
Target Ready
indicates that the current data phase of the
transaction is ready to be completed.
IRDY
I/O
12
PCI/Cardbus
5/3.3
Initiator Ready
indicates that the current bus master is ready to
complete the current data phase. During a write, its assertion
indicates that the initiator is driving valid data onto the data bus.
During a read, its assertion indicates that the initiator is ready to
accept data from the currently-addressed target.
REQ
O
84
PCI/Cardbus
5/3.3
Bus_master Request
indicates to the bus arbiter that this device
wants to become a bus master.
GNT
I
83
-
5/3.3
Bus_master Grant
indicates to this device that access to the bus
has been granted.
IDSEL
I
96
-
5/3.3
ID Select
when actively driven, indicates that the IUHC is chip-
selected for configuration read/write transaction during the phase of
device initialization.
If Cardbus mode (CARD_ON = 1), this pin is should be pulled up to
V
DD
.
DEVSEL
I/O
14
PCI/Cardbus
5/3.3
Device Select
when actively driven, indicates that the driving device
has decoded its address as the target of the current access.
STOP
I/O
15
PCI/Cardbus
5/3.3
PCI Stop
when actively driven, indicates that the target is
requesting the current bus master to stop the transaction.
#
#
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