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參數(shù)資料
| 型號： | μPD72862 |
| 廠商： | NEC Corp. |
| 英文描述： | IEEE1394 OHCI Host Controller(IEEE1394 主控制器) |
| 中文描述： | IEEE1394連接OHCI主機控制器（IEEE1394連接主控制器） |
| 文件頁數(shù)： | 1/36頁 |
| 文件大小： | 194K |
| 代理商： | ΜPD72862 |
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1999
IEEE1394 OHCI HOST CONTROLLER
DATA SHEET
MOS INTEGRATED CIRCUIT
μ
PD72862
Document No. S14265EJ2V0DS00 (2nd edition)
Date Published December 1999 NS CP (K)
Printed in Japan
The information in this document is subject to change without notice. Before using this document, please
confirm that this is the latest version.
Not all devices/types available in every country. Please check with local NEC representative for
availability and additional information.
The
μ
PD72862 is IEEE1394 OHCI-Link controller. The
μ
PD72862 complies with the P1394a draft 2.0
specifications and works up to 400 Mbps.
It supports both of the Cardbus interface and the PCI bus interface.
FEATURES
Compliant with Link Layer Services as defined in 1394 Open Host Controller Interface specification release 1.0
Compliant with protocol enhancement as defined in P1394a draft 2.0
Modular 32-bit host interface compliant to PCI Specification release 2.1
Supports PCI-Bus Power Management Interface Specification release 1.0
Supports Cardbus
Equipped CIS register
Cycle Master and Isochronous Resource Manager capable
Compatible to PHY Layer implementation of 100/200/400 Mbps via 2/4/8-bit data interface
Built-in FIFOs for isochronous transmit (1024 bytes), asynchronous transmit (1024 bytes), and receive (2048
bytes)
32-bit CRC generation and checking for receive/transmit packets
4-isochronous transmit DMAs and 4-isochronous receive DMAs supported
Support both IEEE1394-1995 compliant PHY and P1394a compliant PHY
Internal control and operational registers direct-mapped to PCI configuration space
2-wire Serial EEPROM
TM
interface supported
ORDERING INFORMATION
Part number Package
μ
PD72862GC-9EU 100-pin plastic TQFP (Fine pitch) (14 x 14)
The mark
#
shows major revised points.
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