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| 型號： | ZPSD402A1 |
| 英文描述： | Field Programmable Microcontroller Peripherals(可編程邏輯，零功耗，16K位SRAM,40個可編程I/O,通用PLD有37個輸入) |
| 中文描述： | 現(xiàn)場可編程微控制器外圍設(shè)備（可編程邏輯，零功耗，16K的位的SRAM，40余個可編程輸入/輸出，通用PLD的有37個輸入） |
| 文件頁數(shù)： | 6/108頁 |
| 文件大?。?/td> | 626K |
| 代理商： | ZPSD402A1 |
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ZPSD4XX Famly
5-6
General
Description
(Cont.)
The ZPSD4XX contains EPROM and scratchpad SRAM. The EPROM densities are
256 Kbit, 512 Kbit and 1 Mbit and are divided into four blocks. Each block can be located in
a different address location. The access time of the EPROM includes the address latching
and DPLD decoding. The 16 Kbit Standby SRAM may be used as an extension of the
microcontroller SRAM and also to store backup information that is necessary after a system
power down. Backup power to the SRAM is supplied by the Vstdby pin. Switching between
V
CC
and Vstdby occurs automatically when V
CC
power is removed.
A four bit Page Register enables easy access to the I/O Section, EPROM and SRAM for
microcontrollers with limited address space . The Page Register outputs are connected to
all ZPLDs and can be used to page external devices as well as the internal ZPSD4XX
functional units.
A Power Management Unit (PMU) in the ZPSD4XX enables the user to control the power
consumption on selected functional blocks based on system requirements. For
microcontrollers that do not generate a Chip Select input (CSI) to the peripheral device,
the PMU includes an Automatic Power Down unit (APD) that will turn off the ZPSD4XX
(into standby or sleep mode) based on inactivity of the ALE. The polarity of ALE inactivity
can be defined by the user. In addition to standby mode, the ZPSD4XX includes a SLEEP
mode that will reduce the power consumption to 1 μA.
The ZPSD4XX family is supported by the WSI-PSD Development System (PSDsoft, see
Figure 3) which runs under MS-Windows on the PC. Design entry is done using PSDabel
which creates a minimized logic implementation. PSDabel also provides logic simulation
of the ZPLD. The ZPSD4XX desired configuration is entered using a simple Windows based
menu. The PSDcompiler, which consists of a Fitter and Address Translator, generates
an object file from the PSDabel and MCU code files. The object file can be down loaded
to a programmer (MagicPro
, Data I/O or other third party) or to PSDsim (Silos III Logic
simulator) providing full chip simulation.
The ZPSD4XX standard versions include up to 1 Mb of EPROM, 16 Kbit SRAM, Decode
PLD (DPLD), General Purpose PLD (GPLD), and five 8-bit I/O Ports. They are ideal for
general purpose embedded systems applications.
The ZPSD4XXV low-voltage, low-power versions operate down to 2.7 volts and feature
Sleep Mode current of only 1 microamp (typical).
The ZPSD4XXM mask-programmable versions deliver the lowest cost ZPSD4XX
solution. See the Masked-PSD Ordering Information chapter in this databook for the
mask-programmable ZPSD4XXM ordering procedure.
References in this document to ZPSD4XX versions are generic and also specifically include
any “non-V” products (ZPSD4XX, ZPSD4XXM, and ZPSD4XXRM).
References to ZPSD4XXV versions include ZPSD4XXV and ZPSD4XXVM products.
References to ZPSD4XXM versions include ZPSD4XXM and ZPSD4XXVM products.
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| ZPSD402A1-12J | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Field-Programmable Peripheral |
| ZPSD402A1-12JI | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Field-Programmable Peripheral |
| ZPSD402A1-12LI | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Field-Programmable Peripheral |
| ZPSD402A1-12U | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Field-Programmable Peripheral |
| ZPSD402A1-12UI | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Field-Programmable Peripheral |
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