參數(shù)資料
型號(hào): ZPSD314RV
英文描述: Field Programmable Microcontroller Peripherals(可編程邏輯,零功耗,無SRAM,19個(gè)可編程I/O,通用PLD有16個(gè)輸入)
中文描述: 現(xiàn)場可編程微控制器外圍設(shè)備(可編程邏輯,零功耗,無的SRAM,19余個(gè)可編程輸入/輸出,通用PLD的有16個(gè)輸入)
文件頁數(shù): 22/90頁
文件大?。?/td> 491K
代理商: ZPSD314RV
ZPSD3XX Famly
3-22
Figure 8.
Port C Structure
CS8 (OUTPUT LINE)
FROM PAD
TO PAD
A16
CS9 (OUTPUT LINE)
FROM PAD
TO PAD
A17
CS10 (OUTPUT LINE)
FROM PAD
TO PAD
A18
ALE
ADDRESS INDICATOR
(NOTE 21)
TO
EPROM
PC0
PC1
PC2
CADLOG0
CONF.
BIT
ADDRESS
LATCH
CADLOG1
CONF.
BIT
ADDRESS
LATCH
CPCF1
CONF.
BIT
CADLOG2
CONF.
BIT
ADDRESS
LATCH
CADDHLT
CONFIGURATION
BIT: LATCH OR
TRANSPARENT
CONTROL
CPCF2
CONF.
BIT
CPCF0
CONF.
BIT
NOTES:
21. The CADDHLT configuration bit determines if A18–A16 are transparent via the latch, or if
they must be latched by the trailing edge of the ALE strobe.
22. ZPSD3X2/3X3/3X4R: Individual pins can be configured independently as address or logic
inputs (CADLOG, bits 0–2).
ZPSD3X1: All Port C pins are either address or logic inputs (CATD).
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