參數(shù)資料
型號: ZPSD313V
英文描述: Field Programmable Microcontroller Peripherals(可編程邏輯,零功耗,16K位SRAM,19個可編程I/O,通用PLD有16個輸入)
中文描述: 現(xiàn)場可編程微控制器外圍設(shè)備(可編程邏輯,零功耗,16K的位的SRAM,19余個可編程輸入/輸出,通用PLD的有16個輸入)
文件頁數(shù): 14/90頁
文件大?。?/td> 491K
代理商: ZPSD313V
ZPSD3XX Famly
3-14
Figure 4.
PADDescription
ALE or AS
WR or R/W
A19
A18
A17
A16
A15
A14
A13
A12
A11
ES0
ES1
ES2
ES3
ES4
ES5
ES6
ES7
RS0
CSIOPORT
CSADIN
CSADOUT1
CSADOUT2
CS0/PB0
CS1/PB1
CS2/PB2
CS3/PB3
CS4/PB4
CS5/PB5
CS6/PB6
CS7/PB7
CS8/PC0
CS9/PC1
CS10/PC2
RD/E/DS
8 EPROM BLOCK
SELECT LINES
CSI
RESET
SRAM BLOCK SELECT
*
TRACK MODE
CONTROL SIGNALS
P
0
P
1
P
2
P
3
I/O BASE ADDRESS
PAD
B
PAD
A
NOTES:
4. CSI is a power-down signal. When high, the PAD is in stand-by mode and all its outputs
become non-active. See Tables 12 and 13.
5. RESET deselects all PAD output signals. See Tables 10 and 11.
6. A18, A17, and A16 are internally multiplexed with CS10, CS9, and CS8, respectively.
Either A18 or CS10, A17 or CS9, and A16 or CS8 can be routed to the external pins of
Port C. Port C can be configured as either input or output.
7. P
0
–P
3
are not included on ZPSD3X1 devices.
8. DS is not available on ZPSD3X1 devices.
*
SRAM not available on “R” versions.
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