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參數(shù)資料
| 型號： | Z86C60 |
| 廠商： | ZiLOG, Inc. |
| 英文描述： | CMOS Z8 32KROMMICROCONTROLLER |
| 中文描述： | 的CMOS Z8 32KROMMICROCONTROLLER |
| 文件頁數(shù)： | 1/7頁 |
| 文件大?。?/td> | 58K |
| 代理商： | Z86C60 |
1
P R E L I M I N A R Y
Z86C60/65
CP96Z8X0400
FEATURES
ROM
(KB)
RAM*
(Bytes)
Speed 28-pin
(MHz)
Part
I/O
DIP
Z86C60
Z86C65
16
32
256
256
22
22
16
16
X
X
I
Low EMI Mode Option
I
Auto Latches
I
Two Programmable 8-Bit Counter/Timers Each with 6-
Bit Programmable Prescaler
I
Three Vectored, Priority Interrupts from Three Different
Sources
I
On-Chip Oscillator that Accepts a Crystal Ceramic
Resonator, LC, or External Clock Source
I
ROM Mask Options:
– ROM Protect
– RAM Protect
*General-Purpose
I
28-Pin DIP Package
I
3.0V to 5.5V Operating Range
I
Low-Power Consumption: 200 mW
I
Fast Instruction Pointer: 0.75
μ
s @ 16 MHz
I
Two Standby Modes: STOP and HALT
P
RELMNARY
C
USTOMER
P
ROCUREMENT
S
PECFCATON
Z86C60/65
CMOS Z8
32K ROM M
ICROCONTROLLER
The Z86C60/65 microcontrollers introduce a new level of
sophistication to single-chip architecture. The Z86C65 is a
member of the Z8 single-chip microcontroller family with
32 Kbytes of ROM and 256 bytes of RAM. The Z86C60 is
identical, except that it only has 16 Kbytes of ROM.
The Z86C60/65 are housed in a 28-pin DIP package, and
manufactured in CMOS technology. The Z86C96 ROMless
Z8 will support the Z86C60/65.
Zilog’s CMOS microcontroller offers fast execution, more
efficient use of memory, more sophisticated interrupts,
input/output bit manipulation capabilities, and easy hard-
ware/software system expansion along with low cost and
low power consumption.
The Z86C60/65 architecture is characterized by Zilog’s
8-bit microcontroller core. The device offers a flexible I/O
scheme, an efficient register and address space structure,
multiplexed capabilities between address/data, I/O, and a
number of ancillary features that are useful in many indus-
trial and advanced scientific applications.
For applications which demand powerful I/O capabilities,
the Z86C60/65 fulfills this with 22 pins dedicated to input
and output. These lines are grouped into four ports. Each
port is configurable under software control to provide
timing, status signals, serial or parallel I/O with or without
handshake, and an address/data bus for interfacing exter-
nal memory.
There are three basic address spaces available to support
this wide range of configurations: Program Memory, Data
Memory, and 236 General-Purpose Registers.
To unburden the program from coping with the real-time
problems such as counting/timing and serial data commu-
nication, the Z86C60/65 offers two on-chip counter/timers
with a large number of user selectable modes.
Notes:
All Signals with a preceding front slash, "/", are active Low, e.g.,
B//W (WORD is active Low); /B/W (BYTE is active Low, only).
Power connections follow conventional descriptions below:
Connection
Circuit
Device
Power
Ground
V
GND
V
DD
V
SS
CP96Z8X0400 (5/96)
GENERAL DESCRIPTION
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