參數(shù)資料
型號: Z85C3010PSC
廠商: ZILOG INC
元件分類: 微控制器/微處理器
英文描述: CMOS SCC SERIAL COMMUNICATIONS CONTROLLER
中文描述: 2 CHANNEL(S), 4.1M bps, MULTI PROTOCOL CONTROLLER, PDIP40
封裝: PLASTIC, DIP-40
文件頁數(shù): 46/96頁
文件大?。?/td> 873K
代理商: Z85C3010PSC
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Over
Equal
Reset on Flag Detect
Increment on Byte Detection
Enable Count in SDLC
End of Frame Signal
Status Read Comp
Tail Pointer
4-Bit Counter
Head Pointer
4-Bit Counter
4-Bit Comparator
14 Bits
Byte Counter
Frame Status FIFO Circuitry
5 Bits
FIFO Array
10 Deep by 19 Bits Wide
SCC Status Reg
Residue Bits (3)
Overrun, CRC Error
RR1
5 Bits
EN
6 Bits
8 Bits
6-Bit MUX
2 Bits
EOF = 1
6 Bits
RR1
Bit 7
Bit 6
Bits 5-0
RR6
FIFO Enable
RR7 D5-D0 + RR6 D7-D0
Byte Counter Contains 14 bits
for a 16 KByte maximum count
RR7 D6
FIFO Data available status bit Status Bit set to 1
When reading from FIFO
RR7 D7
FIFO Overflow Status Bit
MSB pf RR(7) is set on Status FIFO overflow
WR(15) Bit 2
Set Enables
Status FIFO
In SDLC Mode the following definitions apply
All Sent bypasses MUX and equals contents of SCC Status Register
Parity Bits bypasses MUX and does the same
EOF is set to 1 whenever reading from the FIFO
Interface
to SCC
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