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參數(shù)資料
| 型號： | XRT91L33IG-F |
| 廠商： | Exar Corporation |
| 文件頁數(shù)： | 9/16頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC MULTIRATE CDR 20TSSOP |
| 標準包裝： | 10 |
| 類型： | 時鐘和數(shù)據(jù)恢復(fù)（CDR），時鐘/頻率同步器，多路復(fù)用器 |
| PLL： | 是 |
| 主要目的： | 以太網(wǎng)，SONET/SDH |
| 輸入： | LVDS，LVPECL |
| 輸出： | LVDS，LVPECL |
| 電路數(shù)： | 1 |
| 比率 - 輸入:輸出： | 1:2 |
| 差分 - 輸入:輸出： | 是/是 |
| 頻率 - 最大： | 622.08MHz |
| 電源電壓： | 3.135 V ~ 3.465 V |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 20-TSSOP（0.173"，4.40mm 寬） |
| 供應(yīng)商設(shè)備封裝： | 20-TSSOP |
| 包裝： | 散裝 |
| 其它名稱： | 1016-1362 |
XRT91L33
2
STS-12/STS-3 MULTIRATE CLOCK AND DATA RECOVERY UNIT
REV. V1.0.0
CLOCK AND DATA RECOVERY OVERVIEW
The clock and data recovery (CDR) unit accepts high speed NRZ serial data from the Differential receiver and
generates a clock with a frequency equal to that of the incoming data. The CDR block uses a reference clock to
train and monitor its clock recovery PLL. Upon startup, the PLL locks to the local reference clock. Once this is
achieved, the PLL attempts to lock onto the incoming receive serial data stream. Whenever the recovered
clock frequency deviates from the local reference clock frequency by more than approximately ±500 ppm, the
clock recovery PLL will switch and lock back onto the local reference clock and declare a Loss of Lock.
Whenever a Loss of Lock or a Loss of Signal event occurs, the CDR will continue to supply a recovered clock
(based on the local reference) to the framer/mapper device. An LOS condition occurs when either SIGD or
LCKTOREFN is low. In this case, the receive serial data output is forced to a logic zero state for the entire
duration of the LOS condition. This acts as a receive data mute upon LOS function to prevent random noise
from being misinterpreted as valid incoming data. When SIGD becomes active again, the recovered clock is
determined to be within ±500 ppm accuracy with respect to the local reference source and LOS is no longer
declared, the clock recovery PLL will switch and lock back onto the incoming receive serial data stream.
FIGURE 2. 20 PIN TSSOP OF XRT91L33 (TOP VIEW)
TABLE 1: ORDERING INFORMATION
PART NUMBER
PACKAGE
OPERATING TEMPERATURE RANGE
XRT91L33IG
20-pin TSSOP Package
-40°C to +85°C
XRT91L33IG-F
20-Pin TSSOP Lead-Free Package
-40°C to +85°C
1
2
3
4
5
6
7
8
9
10
20
19
18
17
16
15
14
13
12
11
VDDA
RXDIP
RXDIN
VSSA
LOCK
STS12_MODE
REFCK
LCKTOREFN
VSS
VDD
VDDA
VSSA
CAP+
CAP-
TEST
SIGD
RXDOP
RXDON
RXCLKOP
RXCLKON
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| XRT91L33IGTR-F | 功能描述:時鐘發(fā)生器及支持產(chǎn)品 Recovery Unit RoHS:否 制造商:Silicon Labs 類型:Clock Generators 最大輸入頻率:14.318 MHz 最大輸出頻率:166 MHz 輸出端數(shù)量:16 占空比 - 最大:55 % 工作電源電壓:3.3 V 工作電源電流:1 mA 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:QFN-56 |
| XRT91L34 | 制造商:EXAR 制造商全稱:EXAR 功能描述:QUAD CHANNEL MULTIRATE STS-12/3/1 AND STM-4/1/0 SONET/SDH CDR |
| XRT91L34ES | 功能描述:外圍驅(qū)動器與原件 - PCI 4 CHOC12/STM4 OC3/STM1 CDR RoHS:否 制造商:PLX Technology 工作電源電壓: 最大工作溫度: 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:FCBGA-1156 封裝:Tray |
| XRT91L34IV | 功能描述:計時器和支持產(chǎn)品 4CH OC12/STM4 OC3/STM1CDR RoHS:否 制造商:Micrel 類型:Standard 封裝 / 箱體:SOT-23 內(nèi)部定時器數(shù)量:1 電源電壓-最大:18 V 電源電壓-最小:2.7 V 最大功率耗散: 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝:Reel |
| XRT91L34IVF | 制造商:Exar Corporation 功能描述:CDR 51.84Mbps/155.52Mbps/622.08Mbps SONET/SDH 128-Pin LQFP 制造商:EXAR 功能描述:CDR 51.84Mbps/155.52Mbps/622.08Mbps SONET/SDH 128-Pin LQFP |
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