參數(shù)資料
型號： XRT91L31IQ
廠商： Exar Corporation
文件頁數(shù)： 7/41頁
文件大?。?/td> 0K
描述： IC TXRX SONET/SDH 8BIT 64QFP
標準包裝： 160
類型： 收發(fā)器，多路復用器
PLL： 是
主要目的： 以太網(wǎng)，SONET/SDH
輸入： LVCMOS，LVPECL，LVTTL
輸出： LVCMOS，LVPECL，LVTTL
電路數(shù)： 1
差分 - 輸入:輸出： 是/是
頻率 - 最大： 622.08MHz
電源電壓： 3.135 V ~ 3.465 V
工作溫度： -40°C ~ 85°C
安裝類型： 表面貼裝
封裝/外殼： 64-FQFP
供應商設備封裝： 64-PQFP（10x10）
包裝： 托盤
XRT91L31
15
REV. 1.0.2
STS-12/STM-4 OR STS-3/STM-1 SONET/SDH TRANSCEIVER
2.0
RECEIVE SECTION
The receive section of XRT91L31 include the inputs RXIP/N, followed by the clock and data recovery unit
(CDR) and receive serial-to-parallel converter. The receiver accepts the high speed Non-Return to Zero (NRZ)
serial data at 622.08 Mbps or 155.52 Mbps through the input interfaces RXIP/N. The clock and data recovery
unit recovers the high-speed receive clock from the incoming scrambled NRZ data stream. The recovered
serial data is converted into an 8-bit-wide, 77.76 Mbps or 19.44 Mbps parallel data and presented to the
RXDO[7:0] parallel interface. This parallel interface is designed for Single-Ended LVTTL operation. A divide-
by-8 version of the high-speed recovered clock RXPCLKOP/N, is used to synchronize the transfer of the 8-bit
RXDO[7:0] data with the receive portion of the framer/mapper device. Upon initialization or loss of signal or
loss of lock, the external reference clock signal of 19.44 MHz or 77.76 MHz is used to start-up the clock
recovery phase-locked loop for proper operation. In certain applications, the CDR block on the XRT91L31 can
be disabled and bypassed by enabling the CDRDIS pin to permit the flexibility of using an externally recovered
receive clock thru the XRXCLKIP/N pins.
2.1
Receive Serial Input
The receive serial inputs are applied to RXIP/N and originate from an AC coupled environement (i.e. AC-
coupled SFP). A simplified block diagram is shown in Figure 3. Since this dievice has internal pull up/pull
down biasing resitors, a 100
line-to-line termination is the only resistor needed and must be installed as
close to the RXI pins as possible. See Applications note for further clarifications.
FIGURE 3. RECEIVE SERIAL INPUT INTERFACE BLOCK
Ω
RXIP
RXIN
Optical Fiber
XRT91L31
STS-12/ STM-4
or
STS-3/ STM-1
Transceiver
XRXCLKIP
XRXCLKIN
( optional)
1k
Install terminators close to
RXIP and RXIN pins
Tie unused differential input pins
to VCC and GND
Internally AC coupled
SFP , Optical Module
100 Ohm
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相關代理商/技術參數(shù)
參數(shù)描述
XRT91L31IQ-F 功能描述:網(wǎng)絡控制器與處理器 IC 8-Bit TTL 3.3V temp -45 to 85C;UART RoHS:否 制造商:Micrel 產(chǎn)品:Controller Area Network (CAN) 收發(fā)器數(shù)量: 數(shù)據(jù)速率: 電源電流（最大值）:595 mA 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:PBGA-400 封裝:Tray
XRT91L31IQ-F 制造商:Exar Corporation 功能描述:SONET Transceiver IC
XRT91L31IQTR 功能描述:總線收發(fā)器 SONET/SDH, FULL DPLX 3.3V I/O, LOS, CMU RoHS:否 制造商:Fairchild Semiconductor 邏輯類型:CMOS 邏輯系列:74VCX 每芯片的通道數(shù)量:16 輸入電平:CMOS 輸出電平:CMOS 輸出類型:3-State 高電平輸出電流:- 24 mA 低電平輸出電流:24 mA 傳播延遲時間:6.2 ns 電源電壓-最大:2.7 V, 3.6 V 電源電壓-最小:1.65 V, 2.3 V 最大工作溫度:+ 85 C 封裝 / 箱體:TSSOP-48 封裝:Reel
XRT91L31IQTR-F 功能描述:總線收發(fā)器 SONET/SDH, FULL DPLX 3.3V I/O, LOS, CMU RoHS:否 制造商:Fairchild Semiconductor 邏輯類型:CMOS 邏輯系列:74VCX 每芯片的通道數(shù)量:16 輸入電平:CMOS 輸出電平:CMOS 輸出類型:3-State 高電平輸出電流:- 24 mA 低電平輸出電流:24 mA 傳播延遲時間:6.2 ns 電源電壓-最大:2.7 V, 3.6 V 電源電壓-最小:1.65 V, 2.3 V 最大工作溫度:+ 85 C 封裝 / 箱體:TSSOP-48 封裝:Reel
XRT91L32 制造商:EXAR 制造商全稱:EXAR 功能描述:STS-12/STM-4 OR STS-3/STM-1 SONET/SDH TRANSCEIVER
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