參數(shù)資料
型號(hào)： XRT83VSH28IB-F
廠商： Exar Corporation
文件頁(yè)數(shù)： 45/75頁(yè)
文件大?。?/td> 0K
描述： IC LIU SH E1 OCTAL 225BGA
標(biāo)準(zhǔn)包裝： 84
類型： 線路接口裝置（LIU）
驅(qū)動(dòng)器/接收器數(shù)： 8/8
規(guī)程： T1，E1，J1
電源電壓： 3.14 V ~ 3.47 V
安裝類型： 表面貼裝
封裝/外殼： 225-BGA
供應(yīng)商設(shè)備封裝： 225-BGA（19x19）
包裝： 托盤(pán)
其它名稱： 1016-1482
XRT83VSH28IB-F-ND
XRT83VSH28
I
REV. 2.0.0
8-CHANNEL E1 SHORT-HAUL LINE INTERFACE UNIT
GENERAL DESCRIPTION................................................................................................. 1
APPLICATIONS ............................................................................................................................................... 1
FIGURE 1. BLOCK DIAGRAM OF THE XRT83VSH28 E1 LIU (HOST MODE)........................................................................................ 1
FIGURE 2. BLOCK DIAGRAM OF THE XRT83VSH28 E1 LIU (HARDWARE MODE) ............................................................................... 2
FEATURES ..................................................................................................................................................... 3
ORDERING INFORMATION .................................................................................................................... 3
PIN DESCRIPTION BY FUNCTION................................................................................... 5
RECEIVE SECTION ......................................................................................................................................... 5
TRANSMIT SECTION ....................................................................................................................................... 8
PARALLEL MICROPROCESSOR INTERFACE..................................................................................................... 10
JITTER
ATTENUATOR .................................................................................................................................... 12
................................................................................................................................................................... 13
CLOCK SYNTHESIZER................................................................................................................................... 13
ALARM FUNCTIONS/REDUNDANCY SUPPORT ................................................................................................. 14
SERIAL MICROPROCESSOR INTERFACE ......................................................................................................... 16
POWER AND GROUND .................................................................................................................................. 16
FUNCTIONAL DESCRIPTION ......................................................................................... 19
1.0 HARDWARE MODE VS HOST MODE ................................................................................................ 19
1.1 FEATURE DIFFERENCES IN HARDWARE MODE ...................................................................................... 19
TABLE 1: DIFFERENCES BETWEEN HARDWARE MODE AND HOST MODE .......................................................................................... 19
2.0 RECEIVE PATH LINE INTERFACE .................................................................................................... 20
FIGURE 3. SIMPLIFIED BLOCK DIAGRAM OF THE RECEIVE PATH...................................................................................................... 20
2.1 LINE TERMINATION (RTIP/RRING) .............................................................................................................. 20
2.1.1 CASE 1: INTERNAL TERMINATION.......................................................................................................................... 20
TABLE 2: SELECTING THE INTERNAL IMPEDANCE ............................................................................................................................. 20
FIGURE 4. TYPICAL CONNECTION DIAGRAM USING INTERNAL TERMINATION .................................................................................... 20
2.1.2 CASE 2: INTERNAL TERMINATION WITH ONE EXTERNAL FIXED RESISTOR FOR ALL MODES .................... 21
TABLE 3: SELECTING THE VALUE OF THE EXTERNAL FIXED RESISTOR ............................................................................................. 21
FIGURE 5. TYPICAL CONNECTION DIAGRAM USING ONE EXTERNAL FIXED RESISTOR ....................................................................... 21
2.2 CLOCK AND DATA RECOVERY ................................................................................................................... 22
FIGURE 6. RECEIVE DATA UPDATED ON THE RISING EDGE OF RCLK .............................................................................................. 22
FIGURE 7. RECEIVE DATA UPDATED ON THE FALLING EDGE OF RCLK ............................................................................................ 22
TABLE 4: TIMING SPECIFICATIONS FOR RCLK/RPOS/RNEG .......................................................................................................... 22
2.2.1 RECEIVE SENSITIVITY .............................................................................................................................................. 23
FIGURE 8. TEST CONFIGURATION FOR MEASURING RECEIVE SENSITIVITY........................................................................................ 23
2.2.2 INTERFERENCE MARGIN ......................................................................................................................................... 23
FIGURE 9. TEST CONFIGURATION FOR MEASURING INTERFERENCE MARGIN .................................................................................... 23
2.2.3 GENERAL ALARM DETECTION AND INTERRUPT GENERATION ........................................................................ 23
2.3 RECEIVE JITTER ATTENUATOR .................................................................................................................. 24
2.4 HDB3 DECODER ............................................................................................................................................ 25
2.5 RPOS/RNEG/RCLK ........................................................................................................................................ 25
FIGURE 10. SINGLE RAIL MODE WITH A FIXED REPEATING "0011" PATTERN................................................................................... 25
FIGURE 11. DUAL RAIL MODE WITH A FIXED REPEATING "0011" PATTERN...................................................................................... 25
2.6 RXMUTE (RECEIVER LOS WITH DATA MUTING) ....................................................................................... 26
FIGURE 12. SIMPLIFIED BLOCK DIAGRAM OF THE RXMUTE FUNCTION ............................................................................................ 26
3.0 TRANSMIT PATH LINE INTERFACE ................................................................................................. 27
FIGURE 13. SIMPLIFIED BLOCK DIAGRAM OF THE TRANSMIT PATH................................................................................................... 27
3.1 TCLK/TPOS/TNEG DIGITAL INPUTS ............................................................................................................ 27
FIGURE 14. TRANSMIT DATA SAMPLED ON FALLING EDGE OF TCLK ............................................................................................... 27
FIGURE 15. TRANSMIT DATA SAMPLED ON RISING EDGE OF TCLK ................................................................................................. 27
TABLE 5: TIMING SPECIFICATIONS FOR TCLK/TPOS/TNEG ........................................................................................................... 28
3.2 HDB3 ENCODER ............................................................................................................................................ 28
TABLE 6: EXAMPLES OF HDB3 ENCODING...................................................................................................................................... 28
3.3 TRANSMIT JITTER ATTENUATOR ............................................................................................................... 29
TABLE 7: MAXIMUM GAP WIDTH FOR MULTIPLEXER/MAPPER APPLICATIONS .................................................................................... 29
3.4 TAOS (TRANSMIT ALL ONES) ..................................................................................................................... 29
FIGURE 16. TAOS (TRANSMIT ALL ONES)...................................................................................................................................... 29
3.5 TRANSMIT DIAGNOSTIC FEATURES .......................................................................................................... 29
3.5.1 ATAOS (AUTOMATIC TRANSMIT ALL ONES)......................................................................................................... 29
FIGURE 17. SIMPLIFIED BLOCK DIAGRAM OF THE ATAOS FUNCTION............................................................................................... 30
3.5.2 QRSS GENERATION.................................................................................................................................................. 30
相關(guān)PDF資料
PDF描述
MS3102R20-18S CONN RCPT 9POS BOX MNT W/SCKT
MAX1031BETI+ IC ADC 10-BIT 300KSPS 28-TQFN-EP
VI-J1Z-MW-F4 CONVERTER MOD DC/DC 2V 40W
LTC2846CG#PBF IC TXRX 3.3V MULTIPROTCOL 36SSOP
VE-2TH-IW-F4 CONVERTER MOD DC/DC 52V 100W
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
XRT83VSH28IB-F 制造商:Exar Corporation 功能描述:T1/E1 LIU IC
XRT83VSH314 制造商:EXAR 制造商全稱:EXAR 功能描述:14-CHANNEL T1/E1/J1 SHORT-HAUL LINE INTERFACE UNIT
XRT83VSH314ES 功能描述:外圍驅(qū)動(dòng)器與原件 - PCI 14 CHT1/E1LIUSH LOW COST VERSION RoHS:否 制造商:PLX Technology 工作電源電壓: 最大工作溫度: 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:FCBGA-1156 封裝:Tray
XRT83VSH314IB 功能描述:接口 - 專用 14 CH, SH T1/E1 1.8V DGTL/3.3V ANLG RoHS:否 制造商:Texas Instruments 產(chǎn)品類型:1080p60 Image Sensor Receiver 工作電源電壓:1.8 V 電源電流:89 mA 最大功率耗散: 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:BGA-59
XRT83VSH314IB-F 功能描述:外圍驅(qū)動(dòng)器與原件 - PCI 14 Channel Short-Haul RoHS:否 制造商:PLX Technology 工作電源電壓: 最大工作溫度: 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:FCBGA-1156 封裝:Tray
發(fā)布緊急采購(gòu)，3分鐘左右您將得到回復(fù)。

采購(gòu)需求

(若只采購(gòu)一條型號(hào)，填寫(xiě)一行即可)

發(fā)布成功！您可以繼續(xù)發(fā)布采購(gòu)。也可以進(jìn)入我的后臺(tái)，查看報(bào)價(jià)

發(fā)布成功！您可以繼續(xù)發(fā)布采購(gòu)。也可以進(jìn)入我的后臺(tái)，查看報(bào)價(jià)

*型號(hào) *數(shù)量 廠商 批號(hào) 封裝
添加更多采購(gòu)

我的聯(lián)系方式

*
*
*