- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄9997 > XRT83L34IVTR (Exar Corporation)IC LIU T1/E1/J1 QUAD 128TQFP PDF資料下載
參數(shù)資料
| 型號： | XRT83L34IVTR |
| 廠商： | Exar Corporation |
| 文件頁數(shù)： | 98/99頁 |
| 文件大小： | 0K |
| 描述： | IC LIU T1/E1/J1 QUAD 128TQFP |
| 標準包裝： | 750 |
| 類型： | 線路接口裝置（LIU） |
| 驅(qū)動器/接收器數(shù)： | 4/4 |
| 規(guī)程： | T1，E1，J1 |
| 電源電壓： | 3.135 V ~ 3.465 V |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 128-LQFP |
| 供應商設備封裝： | 128-TQFP（14x20） |
| 包裝： | 帶卷 (TR) |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁第34頁第35頁第36頁第37頁第38頁第39頁第40頁第41頁第42頁第43頁第44頁第45頁第46頁第47頁第48頁第49頁第50頁第51頁第52頁第53頁第54頁第55頁第56頁第57頁第58頁第59頁第60頁第61頁第62頁第63頁第64頁第65頁第66頁第67頁第68頁第69頁第70頁第71頁第72頁第73頁第74頁第75頁第76頁第77頁第78頁第79頁第80頁第81頁第82頁第83頁第84頁第85頁第86頁第87頁第88頁第89頁第90頁第91頁第92頁第93頁第94頁第95頁第96頁第97頁當前第98頁第99頁
XRT83L34
xr
REV. 1.0.1
QUAD T1/E1/J1 LH/SH TRANSCEIVER WITH CLOCK RECOVERY AND JITTER ATTENUATOR
95
REVISIONS
REVISION
DESCRIPTION
A1.0.1
thru
A1.0.7
Advanced Versions
P1.1.0
Preliminary release version
P1.2.0
Added GHCI_n, SL_1, SL_0, EQG_1 and EQG_0 to Control Global Register 131. Separated Micropro-
cessor description table by register number. Moved absolute maximum and Dc electrical characteristics
before AC electrical characteristics. Replaced TBD’s in electrical ables. Reformated table of contents.
P1.2.1
Added GAUGE1 and GAUGE0 to Control Global Register 131. Corrected control register binary bits.
P1.2.2
Renamed FIFO pin to GAUGE, edited definition and edited defintion of JASEL[1:0] to reflect the FIFO
size is selected by the jitter attenuator select.
P1.2.3
Redefined bits D3, D2 and D0 of register 1, in combination these bits set the jitter attenuator path and
FIFO size.
P1.2.4
Corrected typos in figures 6 and 8. Added Jitter attenuator tables in microprocessor register tables. Mod-
ified microprocessor descrptions, timing diagrams and electrical characteristics.
P1.2.5
Replaced GCHIE with Reserved in Tables 18, 23, 24,25. In the pin list description for INT, replace IMASK
bit to a “1” with GIE bit to a “0”.
P1.2.6
New description for bits D6 - D0 in Tables 27 - 34 Microprocessor Registers.
P1.2.7
Revised Microprocessor interface timing diagrams and data.
P1.2.8
Corrected microprocessor timing information and edited Redundancy section.
P1.2.9
Edited section on RLOS for more detailed explanation.
P1.3.0
Changed definition of TXON_n pin. RXON_n bit included in register tables. Rx transformer ratio changed
from 2:1 to 1:1. Description of Arbitrary Pulse and Gap Clock support added.
P1.3.1
Minor edits to block diagram, changed issue date to January, corrected register 67 in table 18, corrected
table 37.
P1.3.2
Swapped the function of PTS1 and PTS2. Replaced Processor timing diagrams and timing informa-
tion, (Figures 29 and 30 -- Tables 49 and 50).
P1.3.3
Updated the Power Consumption numbers.
P1.3.4
Added the New E1 Arbitrary Pulse Feature. Added descriptions to the global registers.
1.0.0
Final Release.
1.0.1
Added Microprocessor Section. Removed Sychronous Microprocessor modes.
相關PDF資料 |
PDF描述 |
|---|---|
| VI-B6H-MX-B1 | CONVERTER MOD DC/DC 52V 75W |
| IDT72V841L15PFI8 | IC FIFO SYNC 2048X18 15NS 64QFP |
| VI-22V-MY | CONVERTER MOD DC/DC 5.8V 50W |
| MS3106R28-15S | CONN PLUG 35POS STRAIGHT W/SCKT |
| VE-JNL-MX-S | CONVERTER MOD DC/DC 28V 75W |
相關代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| XRT83L34IVTR-F | 功能描述:外圍驅(qū)動器與原件 - PCI RoHS:否 制造商:PLX Technology 工作電源電壓: 最大工作溫度: 安裝風格:SMD/SMT 封裝 / 箱體:FCBGA-1156 封裝:Tray |
| XRT83L38 | 制造商:EXAR 制造商全稱:EXAR 功能描述:OCTAL T1/E1/J1 LH/SH TRANSCEIVER WITH CLOCK RECOVERY AND JITTER ATTENUATOR |
| XRT83L38_07 | 制造商:EXAR 制造商全稱:EXAR 功能描述:OCTAL T1/E1/J1 LH/SH TRANSCEIVER WITH CLOCK RECOVERY AND JITTER ATTENUATOR |
| XRT83L38ES | 功能描述:外圍驅(qū)動器與原件 - PCI RoHS:否 制造商:PLX Technology 工作電源電壓: 最大工作溫度: 安裝風格:SMD/SMT 封裝 / 箱體:FCBGA-1156 封裝:Tray |
| XRT83L38ES-BG | 功能描述:界面開發(fā)工具 Eval System for XRT83L38 Series RoHS:否 制造商:Bourns 產(chǎn)品:Evaluation Boards 類型:RS-485 工具用于評估:ADM3485E 接口類型:RS-485 工作電源電壓:3.3 V |
發(fā)布緊急采購，3分鐘左右您將得到回復。