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參數(shù)資料
| 型號： | XRT82D20IW |
| 廠商： | EXAR CORP |
| 元件分類： | 數(shù)字傳輸電路 |
| 英文描述： | SINGLE CHANNEL E1 LINE INTERFACE UNIT |
| 中文描述： | DATACOM, PCM TRANSCEIVER, PDSO28 |
| 封裝： | 0.300 INCH, SOJ-28 |
| 文件頁數(shù)： | 10/49頁 |
| 文件大?。?/td> | 735K |
| 代理商： | XRT82D20IW |
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XRT82L34
QUAD T1/E1/J1 LINE TRANSCEIVER WITH CLOCK RECOVERY AND JITTER ATTENUATOR
REV. 1.1.0
á
8
CONTROL, ALARM, AND OTHER
P
IN
#
N
AME
T
YPE
D
ESCRIPTION
66
MCLK
I
Master Clock Input
.
This signal is an independent 2.048MHz clock for E1 and 1.544Mhz
clock for T1 system with accuracy better than ±50ppm and duty cycle
within 40% to 60%. The function of MCLK is to provide internal timing for
the PLL clock recovery circuit, jitter attenuator block, reference clock dur-
ing transmit all ones data and timing reference for the microprocessor in
Host Mode operation.
If MCLK is not present for more than 10 μs the transmitter will be pow-
ered down and the output will be tri-stated.
N
OTE
:
Internally pulled -up with a 50k
resistor.
9
HW/HOST
I
Mode Control Input:
This pin is used to select the operating mode of the device, (Hardware
Mode or Host Mode.)
In
Hardware Mode
, the parallel Microprocessor interface is disabled and
enables all hardware control pin functions.
In
Host Mode
, the parallel microprocessor interface pins are used for
control functions.
N
OTE
:
Internally pulled "High" with 50k
.
14
15
16
17
TxOff_0
TxOff_
TxOff_
TxOff_
I
Powered-down Transmitter_n
.
Hardware Mode,
tie this pin "High" to power-down channel 0 transmitter and set TTIP_n
and TRing_n to high impedance.
N
OTE
:
Internally pulled -up with a 50k
resistor.
10
Codes
I
Coding/Decoding Select
. In Hardware Mode, if single-rail data format is
selected (pin 8 =”1”), connect this pin "High" to select AMI encoding and
decoding. Connect this pin Low to select HDB3 in E1 or B8ZS in T1 sys-
tem.
6
RESET
I
Hardware Reset
(Active Low). When this pin is tied Low for more than
10
μ
S, the device is put in the reset state.
N
OTE
:
Internally pulled -up with a 50k
resistor.
7
CLKE
I
Hardware Mode
Clock Edge:
In Hardware Mode, connect this pin Low to select falling edge of TxClk to
sample input data and also select RxPOS/RxNEG data to be valid on
falling edge of RxClk. Connect this pin "High" to select rising edge of
TxClk to sample input data and also selects RxPOS/RxNEG data to be
updated on the rising edge of RxClk.
Pin 9
Operating Mode
“Low”
Host Mode
“High”
Hardware Mode
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| XRT82D20IW-F | 功能描述:網(wǎng)絡(luò)控制器與處理器 IC Single Ch; 3.3V-5V temp -45 to 85C RoHS:否 制造商:Micrel 產(chǎn)品:Controller Area Network (CAN) 收發(fā)器數(shù)量: 數(shù)據(jù)速率: 電源電流（最大值）:595 mA 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:PBGA-400 封裝:Tray |
| XRT82D20IW-F | 制造商:Exar Corporation 功能描述:T1/E1 LIU IC |
| XRT82D20IWTR | 功能描述:外圍驅(qū)動器與原件 - PCI Single Ch E1 LIU RoHS:否 制造商:PLX Technology 工作電源電壓: 最大工作溫度: 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:FCBGA-1156 封裝:Tray |
| XRT82D20IWTR-F | 功能描述:外圍驅(qū)動器與原件 - PCI Single Ch E1 LIU RoHS:否 制造商:PLX Technology 工作電源電壓: 最大工作溫度: 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:FCBGA-1156 封裝:Tray |
| XRT82L24 | 制造商:EXAR 制造商全稱:EXAR 功能描述:QUAD E1 LINE TRANSCEIVER WITH CLOCK RECOVERY AND JITTER ATTENUATOR |
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