參數(shù)資料
型號: XRT73L00AIV
廠商: EXAR CORP
元件分類: 數(shù)字傳輸電路
英文描述: E3/DS3/STS-1 LINE INTERFACE UNIT
中文描述: DATACOM, PCM TRANSCEIVER, PQFP44
封裝: 10 X 10 MM, 1.40 MM HEIGHT, TQFP-44
文件頁數(shù): 46/53頁
文件大小: 604K
代理商: XRT73L00AIV
XRT73L00
E3/DS3/STS-1 LINE INTERFACE UNIT
REV. 1.2.0
á
43
N
OTES
:
1. The Transmit Drive Monitor circuit does not have to
be used to operate the Transmit Section of the
XRT73L00. This is purely a diagnostic feature.
2. The Transmit Drive Monitor feature can also be
used to monitor the Transmit Output Line Signal of
another LIU IC as illustrated in Figure 32.
Presented in Figure 32, if LIU # 1 (U1) fails, then LIU
# 2 (U2) drives its DMO output pin “High”. Likewise, if
LIU # 2 (U2) fails, then LIU # 1 (U1) drives its DMO
output pin “High”.
The scheme presented in Figure 32 is a better design
approach. It overcomes situations in which a LIU
monitoring its own signal (Figure 31) may experience
a failure mode such that it cannot drive a bipolar sig-
nal onto the line. That same failure mode may pre-
vent the LIU from driving the DMO output pin “High”.
4.6
T
HE
TAOS (T
RANSMIT
A
LL
O
NE
S) F
EATURE
The XRT73L00 can transmit an all “1’s” pattern onto
the line by toggling a single input pin or by setting a
single bit-field in one of the Command Registers to
“1”.
N
OTE
:
When this feature is activated, the Transmit Section
of the XRT73L00 overwrites the Terminal Equipment data
with this all “1’s” pattern.
This feature can be activated by either of the following
methods.
When the XRT73L00 is operating in the Hardware
Mode:
Configure the device to transmit an all “1’s” pattern by
toggling the TAOS input pin (pin 2) “High”. Terminate
the all “1’s” pattern by toggling the TAOS input pin
“Low”.
When the XRT73L00 is operating in the HOST
Mode:
If the XRT73L00 is operating in the HOST Mode, the
TAOS input pin is disabled. Consequently, the
XRT73L00 can be configured to transmit an all “1’s”
pattern by writing to Command Register CR1 and set-
ting the TAOS bit-field (bit D3) to “1”.
The all “1’s” pattern can be terminated by writing to
Command Register CR1 and setting the TAOS bit-
field (D3) to “0".
F
IGURE
32. T
WO
LIU’
S
, E
ACH
M
ONITORING
THE
T
RANSMIT
O
UTPUT
S
IGNAL
OF
THE
O
THER
LIU IC
R1
31.6
BNC
T1
R2
31.6
R7
31.6
BNC
R8
31.6
TTIP
TRING
R3
270
R4
270
R5
270
R6
270
TRING
TTIP
MRING
MTIP
MRING
MTIP
DMO_Channel_2
DMO_Channel_1
DMO
DMO
T2
PE-68629
PE-68629
TXOFF
TXOFF
U1
U2
COMMAND REGISTER CR1 (ADDRESS = 0X01)
D4
D3
D2
D1
D0
TXOFF
TAOS
TXCLKINV
TXLEV
TXBIN
0
1
X
X
X
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