參數(shù)資料
型號(hào)： XRT71D00IQ-F
廠商： Exar Corporation
文件頁(yè)數(shù)： 5/26頁(yè)
文件大?。?/td> 0K
描述： IC JITTER ATTENUATOR SGL 32TQFP
標(biāo)準(zhǔn)包裝： 250
類(lèi)型： *
PLL： 是
輸入： 時(shí)鐘
輸出： 時(shí)鐘
電路數(shù)： 1
比率 - 輸入:輸出： 3:2
差分 - 輸入:輸出： 無(wú)/無(wú)
頻率 - 最大： 44.736MHz
除法器/乘法器： 無(wú)/無(wú)
電源電壓： 3.135 V ~ 5.25 V
工作溫度： -40°C ~ 85°C
安裝類(lèi)型： 表面貼裝
封裝/外殼： 32-LQFP
供應(yīng)商設(shè)備封裝： 32-TQFP（7x7）
包裝： 托盤(pán)
á
XRT71D00
E3/DS3/STS-1 JITTER ATTENUATOR
REV. 1.2.0
12
SYSTEM DESCRIPTION
The XRT71D00 is a fully integrated and self-contained
DS3, E3 and STS-1 Jitter Attenuator IC which was de-
signed to function as either a “Jitter Attenuator” or as a
“Clock Smoother” within SONET De-Synchronizer ap-
plications.
More specifically, the XRT71D00 device was de-
signed to do the following.
1. To attenuate the Jitter (of the incoming clock and
data) such that the user’s system will comply with
the following jitter transfer characteristic require-
ments.
ETSI TBR-24 (for E3 applications)
ITU-T G.751 (for E3 applications)
ITU-T G.752 (for E3 applications)
ITU-T G.755 (for E3 applications)
Bellcore GR-499-CORE (Category I to Category
II Interface Jitter Transfer Characteristic require-
ments for DS3 applications).
Bellcore GR-253-CORE (for SONET STS-1 appli-
cations)
2. To receive the gapped 51.84MHz clock and data
signals, from an “OC-N to DS3 Mapper/De-Map-
per” IC; and to smooth these signals to an “un-
gapped” 44.736MHz clock and data signals. This
particular application is often referred to as a
“SONET De-synchronizer” application. In this
application, the “smoothed” RRCLK and RRPOS
signals could (potentially) be routed to a DS3 LIU
IC, for transmission to a remote terminal equip-
ment, over coaxial cable.
In addition, the XRT71D00 also meets both the “map-
ping” and “pointer adjustment” jitter generation crite-
ria for both Category I and Category II interfaces as
specified in Bellcore GR-253.
The XRT71D00 also meets the DS3 wander specifi-
cation that apply to SONET and asynchronous inter-
faces as specified in the ANSI T1.105.03b 1997 stan-
dard.
Figure 5 presents a simple block diagram of the
XRT71D00 device, when it is configured to operate in
the “Hardware” Mode. Likewise Figure 6 presents a
simple block diagram of the XRT71D00 device, when
it is configured to operate in the “Host” Mode.
FIGURE 5. ILLUSTRATION OF THE XRT71D00 (CONFIGURED TO OPERATE IN THE “HARDWARE” MODE)
16/32 Bit FIFO
Timing Control Block /
Phase locked Loop
Write Clock
Read Clock
RRClk
RRPOS
RRNEG
FL
DJA
RClk
ClkES
RPOS
RNEG
BWS
ICT
MClk
Jittery
Clock
Smoothed
Clock
FSS
HOST/HW
Reset
E3/DS3
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參數(shù)描述
XRT71D00IQTR-F 功能描述:時(shí)鐘合成器/抖動(dòng)清除器 DS3/E3/STS-1Jit Attn 3.3/5.0V 1 CH 1 CHIP RoHS:否 制造商:Skyworks Solutions, Inc. 輸出端數(shù)量: 輸出電平: 最大輸出頻率: 輸入電平: 最大輸入頻率:6.1 GHz 電源電壓-最大:3.3 V 電源電壓-最小:2.7 V 封裝 / 箱體:TSSOP-28 封裝:Reel
XRT71D03 制造商:EXAR 制造商全稱(chēng):EXAR 功能描述:3 CHANNEL E3/DS3/STS-1 JITTER ATTENUATOR
XRT71D03ES 功能描述:時(shí)鐘合成器/抖動(dòng)清除器 3CH T3/E3JA w/T73LC03A RoHS:否 制造商:Skyworks Solutions, Inc. 輸出端數(shù)量: 輸出電平: 最大輸出頻率: 輸入電平: 最大輸入頻率:6.1 GHz 電源電壓-最大:3.3 V 電源電壓-最小:2.7 V 封裝 / 箱體:TSSOP-28 封裝:Reel
XRT71D03IV 制造商:EXAR 制造商全稱(chēng):EXAR 功能描述:3 CHANNEL E3/DS3/STS-1 JITTER ATTENUATOR
XRT71D03IV-F 功能描述:時(shí)鐘合成器/抖動(dòng)清除器 RoHS:否 制造商:Skyworks Solutions, Inc. 輸出端數(shù)量: 輸出電平: 最大輸出頻率: 輸入電平: 最大輸入頻率:6.1 GHz 電源電壓-最大:3.3 V 電源電壓-最小:2.7 V 封裝 / 箱體:TSSOP-28 封裝:Reel
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