XRD98L23
4
Rev. 1.00
ELECTRICAL CHARACTERISTICS
Test Conditions: AV
DD=DVDD=3.3V, ADCCLK=10MHz, 50% Duty Cycle, TA=25°C unless otherwise specified.
Symbol
Parameter
Min.
Typ.
Max.
Unit
Conditions
Power Supplies
AV
DD
Analog Power Supply
3.0
3.3
3.6
V
DV
DD
Digital I/O Power Supply
3.0
3.3
3.6
V
DV
DD < AVDD
I
DD
Supply Current (total)
25
60
mA
V
DD=3.0V
IDD
PD
Power Down Power Supply Current
50
A
V
DD=3.0V
ADC Specifications
RES
Resolution
8
Bits
F
s
Maximum Sampling Rate
12
MSPS
DNL
Differential Non-Linearity
±0.5
LSB
INL
Integral Non-Linearity
±1.0
LSB
MON
Monotonicity
Yes
V
RT
Top Reference Voltage
2.1
2.2
2.6
V
RB
Bottom Reference Voltage
AV
DD/10
V
DV
REF
Differential Reference Voltage
0.18
0.67AV
DD
V
(V
RT - VRB)
R
L
Ladder Resistance
300
600
780
PGA & Offset DAC Specifications
PGARES
PGA Resolution
6
Bits
PGAG
MIN
Minimum Gain
0.950
1.0
1.35
V/V
PGAG
MAX
Maximum Gain
9.5
10.0
10.50
V/V
PGAGD
Gain Adjustment Step Size
0.14
V/V
V
BLACK
Black Level Input Adjust Range
-60
+300
mV
DC Configuration
DACRES
Offset DAC Resolution
8
Bits
OFF
MIN
Minimum Offset Adjustment
-180
-120
-80
mV
Mode 111, D5=0 (Note 1)
OFF
MAX
Maximum Offset Adjustment
+200
+360
+400
mV
Mode 111, D5=0
OFF
MIN
Minimum Offset Adjustment
-350
-240
-100
mV
Mode 111, D5=1 (Note 1)
OFF
MAX
Maximum Offset Adjustment
+100
+240
+350
mV
Mode 111, D5=1
OFF
Offset Adjustment Step Size
1.88
mV
Note 1:
The additional ±60 mV of adjustment with respect to the black level input range is needed to compensate
for any additional offset introduced by the XRD98L23 Buffer/PGA internally.