- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄10745 > XRD9818ACG-F (Exar Corporation)IC 16B CCD/CIS SIG PROC 28TSSOP PDF資料下載
參數(shù)資料
| 型號： | XRD9818ACG-F |
| 廠商： | Exar Corporation |
| 文件頁數(shù)： | 8/28頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC 16B CCD/CIS SIG PROC 28TSSOP |
| 標(biāo)準(zhǔn)包裝： | 47 |
| 位數(shù)： | 16 |
| 通道數(shù)： | 3 |
| 功率（瓦特）： | 325mW |
| 電壓 - 電源，模擬： | 3 V ~ 3.6 V |
| 電壓 - 電源，數(shù)字： | 3 V ~ 3.6 V |
| 封裝/外殼： | 28-TSSOP（0.173"，4.40mm 寬） |
| 供應(yīng)商設(shè)備封裝： | 28-TSSOP |
| 包裝： | 管件 |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁當(dāng)前第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁
XRD9818
xr
3-CHANNEL 16-BIT LINEAR CCD/CIS SENSOR SIGNAL PROCESSOR
REV. 1.0.1
16
4.0
CIRCUIT OPERATION
4.1
Analog Inputs
4.1.1
Sampling
The XRD9818’s analog front end (AFE) uses a switched capacitor network to achieve a correlated double
sample (CDS) of the input in CCD mode or a sample and hold (S/H) of the input in CIS mode. Figure 3 shows
the 9818’s AFE (CDS/SH + PGA) which samples and gains the input signal. Figure 4 shows the external and
internal timing requirements to achieve a correlated double sample and gain of a CCD input signal.
In addition to sampling and gaining the CCD signal the 9818 input is designed to reject the reset pulse noise
present also.
The XRD9818 can withstand reset pulses up to 1.5V or more depending upon the input
conditions. The timing signal
φ
R controls SW2 and SW3 is generated internally by the XRD9818.
SW2 and
SW3 open after a short delay following the sampling edge of VSAMP and close at the leading edge of BSAMP.
The XRD9818 utilizes a differential input and signal path which samples the CCD reference level on capacitors
C1 and C2. When
φ
B goes high, SW4 and SW5 close storing the CCD reference level on C1 and C2. When
φ
B goes low a fixed gain is applied to the input signal as it tracks the video input.
When
φ
V goes high the video
content is applied to capacitors C5 and C6. The final video level is stored on C5 and C6 when
φ
V goes low.
The video content is then amplified again and sampled by the ADC at the proper time
FIGURE 3. XRD9818 INPUT CIRCUITRY
FIGURE 4. INTERNAL AFE SAMPLE TIMING (EX. 3CH CCD MODE)
φ
B
φ
B
φ
V
φ
V
φ
V
φ
V
φ
R
to ADC
φ
CL
C1
C2
C3
C4
C5
C6
C7
C8
C1 = C2 = 7.5pf
C3 = C4 = 7.5pf or 11pf
C5 = C6 = 1.5pf or 7.89pf
C7 = C8 = 1pf
SW1
SW2
SW3
SW4
φ
R
SW5
SW6
SW7
SW8
SW9
Input
Reference
CCD
IN
ADCLK
byte
BSAMP
VSAMP
ADCLK
nibble
φ
R
φ
B
φ
V
φ
V = ADCLK
VSAMP
Note :
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| MAX998EUT+T | IC COMP SNGL HI-SPEED LP SOT23-6 |
| AD73360ASUZ-REEL | IC ANALOG FRONT END 6CH 44-TQFP |
| AD73360LARZ-REEL7 | IC PROCESSOR FRONTEND 6CH 28SOIC |
| MAX965EUA+ | IC COMPARATOR R-R 8-UMAX |
| MAX966ESA+ | IC COMPARATOR R-R 8-SOIC |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| XRD9818ACGTR | 功能描述:模數(shù)轉(zhuǎn)換器 - ADC RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 結(jié)構(gòu):Sigma-Delta 轉(zhuǎn)換速率:125 SPs to 8 KSPs 分辨率:24 bit 輸入類型:Differential 信噪比:107 dB 接口類型:SPI 工作電源電壓:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:VQFN-32 |
| XRD9818ACGTR-F | 功能描述:模數(shù)轉(zhuǎn)換器 - ADC RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 結(jié)構(gòu):Sigma-Delta 轉(zhuǎn)換速率:125 SPs to 8 KSPs 分辨率:24 bit 輸入類型:Differential 信噪比:107 dB 接口類型:SPI 工作電源電壓:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:VQFN-32 |
| XRD9818EVAL | 功能描述:數(shù)據(jù)轉(zhuǎn)換 IC 開發(fā)工具 XRD9818 EVAL BOARD RoHS:否 制造商:Texas Instruments 產(chǎn)品:Demonstration Kits 類型:ADC 工具用于評估:ADS130E08 接口類型:SPI 工作電源電壓:- 6 V to + 6 V |
| XRD9820 | 制造商:EXAR 制造商全稱:EXAR 功能描述:3-Channel, 10/12-Bit Linear CCd and CIS Sensor signal Processors |
| XRD9822 | 制造商:EXAR 制造商全稱:EXAR 功能描述:3-Channel, 10/12-Bit Linear CCd and CIS Sensor signal Processors |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。