TABLE 21: UART RESET CONDITIONS DLM, DLL (Both TX and RX) DLM = 0x00 and DLL = 0" />
參數(shù)資料
型號: XR20M1280L32-0A-EB
廠商: Exar Corporation
文件頁數(shù): 44/63頁
文件大小: 0K
描述: EVAL BOARD FOR XR20M1280L32
產(chǎn)品培訓(xùn)模塊: XR21V141x Full-Speed USB UART Family
UARTs with Integrated Level Shifters
標(biāo)準(zhǔn)包裝: 1
主要目的: 接口,UART
已用 IC / 零件: XR20M1280L32
已供物品:
其它名稱: 1016-1630
TABLE 21: UART RESET CONDITIONS
DLM, DLL
(Both TX and RX)
DLM = 0x00 and DLL = 0x01. Only resets to these values during a power up.
They do not reset when the Reset Pin is asserted.
DLD
Bits 7-0 = 0x00
RHR
Bits 7-0 = 0xXX
THR
Bits 7-0 = 0xXX
IER
Bits 7-0 = 0x00
FCR
Bits 7-0 = 0x00
ISR
Bits 7-0 = 0x01
LCR
Bits 7-0 = 0x00
MCR
Bits 7-0 = 0x00
LSR
Bits 7-0 = 0x60
SHR
Bits 7-0 = 0x00
MSR
Bits 7-0 =0xX0 (Bits 7-4 = complement of modem inputs)
SFR
Bits 7-0 = 0x00
SPR
Bits 7-0 = 0xFF
GPIOLVL
Bits 7-0 = 0x00
EMSR
Bits 7-0 = 0x00
FC
Bits 7-0 = 0x00
TRG
Bits 7-0 = 0x01
FCTR
Bits 7-0 = 0x00
EFR
Bits 7-0 = 0x00
XON1
Bits 7-0 = 0x00
XON2
Bits 7-0 = 0x00
XOFF1
Bits 7-0 = 0x00
XOFF2
Bits 7-0 = 0x00
GPIOINT
Bits 7-0 = 0x00
GPIO3T
Bits 7-0 = 0x00
GPIOINV
Bits 7-0 = 0x00
GPIOSEL
Bits 7-0 = 0xFF
I/O SIGNALS
RESET STATE
TX
HIGH
RTS#
HIGH
DTR#
HIGH
IRQ#
HIGH
XR20M1280
49
REV. 1.0.0
I2C/SPI UART WITH 128-BYTE FIFO AND INTEGRATED LEVEL SHIFTERS
REGISTERS
RESET STATE
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