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參數(shù)資料
| 型號： | XR20M1172L32-0B-EB |
| 廠商： | Exar Corporation |
| 文件頁數(shù)： | 24/55頁 |
| 文件大?。?/td> | 0K |
| 描述： | EVAL BOARD FOR XR20M1172 32QFN |
| 標準包裝： | 1 |
| 主要目的： | 接口，UART |
| 嵌入式： | 否 |
| 已用 IC / 零件： | XR20M1172 |
| 主要屬性： | 2 通道 |
| 次要屬性： | I²C & SPI 接口 |
| 已供物品： | 板 |
| 其它名稱： | 1016-1625 XR20M1172L32-0B-EB-ND |
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XR20M1172
30
TWO CHANNEL I2C/SPI UART WITH 64-BYTE FIFO
REV. 1.2.0
]
ISR[0]: Interrupt Status
Logic 0 = An interrupt is pending and the ISR contents may be used as a pointer to the appropriate interrupt
service routine.
Logic 1 = No interrupt pending (default condition).
ISR[3:1]: Interrupt Status
These bits indicate the source for a pending interrupt at interrupt priority levels (See Interrupt Source Table 9).
ISR[4]: Xoff/Xon or Special Character Interrupt Status
This bit is set when EFR[4] = 1 and IER[5] = 1. ISR bit-4 indicates that the receiver detected a data match of
the Xoff character(s). If this is an Xoff interrupt, it is cleared when XON is received. If it is a special character
interrupt, it is cleared by reading ISR.
ISR[5]: RTS#/CTS# Interrupt Status
This bit is enabled when EFR[4] = 1. ISR bit-5 indicates that the CTS# or RTS# has been de-asserted.
ISR[7:6]: FIFO Enable Status
In Non-FIFO Mode, these bits are a logic 0. In FIFO Mode, these bits are a logic 1.
4.5
FIFO Control Register (FCR) - Write-Only
This register is used to enable the FIFOs, clear the FIFOs and set the transmit/receive FIFO trigger levels.
FCR[0]: TX and RX FIFO Enable
Logic 0 = Non-FIFO Mode (default). Transmit and receive FIFOs disabled for 16450 compatibility. For
normal operation, the FIFO Mode must be enabled.
Logic 1 = FIFO Mode. Enable the transmit and receive FIFOs. This bit must be set to a logic 1 when other
FCR bits are written or they will not be programmed.
TABLE 9: INTERRUPT SOURCE AND PRIORITY LEVEL
PRIORITY
ISR REGISTER STATUS BITS
SOURCE OF INTERRUPT
LEVEL
BIT-5
BIT-4
BIT-3
BIT-2
BIT-1
BIT-0
1
0
1
0
LSR (Receiver Line Status Register)
2
0
1
0
RXRDY (Receive Data Time-out)
3
0
1
0
RXRDY (Received Data Ready)
4
0
1
0
TXRDY (Transmit Ready)
5
0
MSR (Modem Status Register)
6
1
0
GPIO (General Purpose Inputs)
7
0
1
0
RXRDY (Received Xoff or Special character)
8
1
0
CTS#, RTS# change of state
-
0
1
None (default)
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| XR20M1280 | 制造商:EXAR 制造商全稱:EXAR 功能描述:I2C/SPI UART WITH 128-BYTE FIFO AND INTEGRATED LEVEL SHIFTERS |
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| XR20M1280IL32-F | 功能描述:UART 接口集成電路 1Ch 12C/SPI UART w/ Lvl Shftrs & 8 GPIOs RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 數(shù)據(jù)速率:3 Mbps 電源電壓-最大:3.6 V 電源電壓-最小:2.7 V 電源電流:20 mA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:LQFP-48 封裝:Reel |
| XR20M1280IL32TR-F | 功能描述:UART 接口集成電路 1Ch 12C/SPI UART w/ Lvl Shftrs & 8 GPIOs RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 數(shù)據(jù)速率:3 Mbps 電源電壓-最大:3.6 V 電源電壓-最小:2.7 V 電源電流:20 mA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:LQFP-48 封裝:Reel |
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