REV. 1.0.4 2.25V TO 3.6V QUAD UART WITH 32-BYTE FIFO CDA# CDB# CDC# CDD# - 64 18 31 49 9 27 43 61 19 42 59 2 I UART channels A-" />
參數(shù)資料
型號： XR16V564IV-F
廠商： Exar Corporation
文件頁數(shù)： 52/54頁
文件大?。?/td> 0K
描述： IC UART FIFO 32B QUAD 64LQFP
標準包裝： 160
特點： *
通道數(shù)： 4，QUART
FIFO's： 32 字節(jié)
規(guī)程： RS232
電源電壓： 2.25 V ~ 3.6 V
帶自動流量控制功能： 是
帶IrDA 編碼器/解碼器： 是
帶故障啟動位檢測功能： 是
帶調(diào)制解調(diào)器控制功能： 是
帶CMOS： 是
安裝類型： 表面貼裝
封裝/外殼： 64-LQFP
供應(yīng)商設(shè)備封裝： 64-LQFP（10x10）
包裝： 托盤
XR16V564/564D
7
REV. 1.0.4
2.25V TO 3.6V QUAD UART WITH 32-BYTE FIFO
CDA#
CDB#
CDC#
CDD#
-
64
18
31
49
9
27
43
61
19
42
59
2
I
UART channels A-D Carrier-Detect (active low) or
general purpose input. This input should be connected
to VCC when not used. This input has no effect on the
UART.
RIA#
RIB#
RIC#
RID#
-
63
19
30
50
8
28
42
62
18
43
58
3
I
UART channels A-D Ring-Indicator (active low) or gen-
eral purpose input. This input should be connected to
VCC when not used. This input has no effect on the
UART.
ANCILLARY SIGNALS
XTAL1
18
25
35
50
I
Crystal or external clock input. Caution: this input is not
5V tolerant.
XTAL2
19
26
36
51
O
Crystal or buffered clock output.
16/68#
14
-
31
-
I
Intel or Motorola Bus Select (input with internal pull-
up).
When 16/68# pin is HIGH, 16 or Intel Mode, the device
will operate in the Intel bus type of interface.
When 16/68# pin is LOW, 68 or Motorola mode, the
device will operate in the Motorola bus type of inter-
face.
Motorola bus interface is not available on the 64 pin
package.
CLKSEL
-
21
30
-
I
Baud-Rate-Generator Input Clock Prescaler Select for
channels A-D. This input is only sampled during power
up or a reset. Connect to VCC for divide by 1 (default)
and GND for divide by 4. MCR[7] can override the
state of this pin following a reset or initialization. See
MCR bit-7 and
Figure 6 in the Baud Rate Generator
section.
RESET
(RESET#)
20
27
37
53
I
When 16/68# pin is HIGH for Intel bus interface, this
input becomes the Reset pin (active high). In this
case, a 40 ns minimum HIGH pulse on this pin will
reset the internal registers and all outputs. The UART
transmitter output will be held HIGH, the receiver input
will be ignored and outputs are reset during reset
period (Table 17). When 16/68# pin is at LOW for
Motorola bus interface, this input becomes Reset# pin
(active low). This pin functions similarly, but instead of
a HIGH pulse, a 40 ns minimum LOW pulse will reset
the internal registers and outputs.
Motorola bus interface is not available on the 64 pin
package.
VCC
2, 24, 37 4, 35, 52
13, 47,
64
5, 25, 45,
65
Pwr 2.25V to 3.6V power supply. All inputs, except XTAL1,
are 5V tolerant.
GND
21, 47
14, 28,
45, 61
6, 23, 40,
57
16, 36,
56, 76
Pwr Power supply common, ground.
Pin Description
NAME
48-QFN
PIN #
64-LQFP
PIN #
68-PLCC
PIN #
80-LQFP
PIN #
TYPE
DESCRIPTION
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參數(shù)描述
XR16V564IVTR-F 制造商:Exar Corporation 功能描述:UART 4-CH 32Byte FIFO 2.5V/3.3V 64-Pin LQFP T/R 制造商:Exar Corporation 功能描述:XR16V564IVTR-F
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