參數(shù)資料
型號： XR16L784CVTR-F
廠商： Exar Corporation
文件頁數(shù)： 1/51頁
文件大?。?/td> 0K
描述： IC UART FIFO 64B QUAD 64LQFP
標(biāo)準(zhǔn)包裝： 1,000
特點： *
通道數(shù)： 4，QUART
FIFO's： 64 字節(jié)
規(guī)程： RS485
電源電壓： 2.97 V ~ 5.5 V
帶自動流量控制功能： 是
帶IrDA 編碼器/解碼器： 是
帶故障啟動位檢測功能： 是
帶調(diào)制解調(diào)器控制功能： 是
安裝類型： 表面貼裝
封裝/外殼： 64-LQFP
供應(yīng)商設(shè)備封裝： 64-LQFP（10x10）
包裝： 帶卷 (TR)
Exar Corporation 48720 Kato Road, Fremont CA, 94538 (510) 668-7000 FAX (510) 668-7017 www.exar.com
XR16L784
HIGH PERFORMANCE 2.97V TO 5.5V QUAD UART
JULY 2008
REV. 1.2.3
GENERAL DESCRIPTION
The
XR16L7841
(784)
is
a
quad
Universal
Asynchronous Receiver and Transmitter (UART). The
device is designed for high bandwidth requirement in
communication systems. The global interrupt source
register
provides
a
complete
interrupt
status
indication for all 4 channels to speed up interrupt
parsing. Each UART has its own 16C550 compatible
set of configuration registers, transmit and receive
FIFOs of 64 bytes, fully programmable transmit and
receive FIFO level triggers, transmit and receive
FIFO level counters, automatic RTS/CTS or DTR/
DSR hardware flow control with programmable
hysteresis,
automatic
software
(Xon/Xoff)
flow
control, IrDA (Infrared Data Association) encoder/
decoder, and a 16-bit general purpose timer/counter.
NOTE: 1 Covered by U.S. Patents #5,649,122 and #5,949,787
APPLICATIONS
Remote Access Servers
Ethernet Network to Serial Ports
Network Management
Factory Automation and Process Control
Point-of-Sale Systems
Multi-port RS-232/RS-422/RS-485 Cards
FEATURES
2.97V to 5.5V operation with 5V Tolerant Inputs
8-bit Intel or Motorola Data Bus Interface
Single Open Drain Interrupt output for all 4
channels
Global Interrupt Source Registers for all channels
5G (Fifth Generation) “Flat” Register Set
Each UART is Independently Controlled with:
■ 16C550 Compatible Registers
■ 64-byte Transmit and Receive FIFOs
■ Transmit and Receive FIFO Level Counters
■ Programmable TX and RX FIFO Trigger Levels
■ Automatic RTS/CTS or DTR/DSR Flow Control
■ Selectable RTS Flow Control Hysteresis
■ Automatic Xon/Xoff Software Flow Control
■ Automatic RS485 Half-duplex Control Output
with 16 Selectable Turn-around Delay
■ Infrared (IrDA 1.1) Data Encoder/Decoder
■ Programmable Data Rate with Prescaler
■ Up to 3.12 (16x) and 6.25 (8x) Mbps Data Rate
A General Purpose 16-bit Timer/Counter
Sleep Mode with Automatic Wake-up Indicator
64-pin LQFP Package (10x10x1.4 mm)
FIGURE 1. BLOCK DIAGRAM
TMRCK
Device
Configuration
Register
s
XTAL1
XTAL2
Crystal Osc/
Buffer
TX0, RX0, DTR0#,
DSR0#, RTS0#,
CTS0#, CD0#, RI0#
Intel or
Motorola
Data
Bus
Interface
TX3, RX3, DTR3#,
DSR3#, RTS3#,
CTS3#, CD3#, RI3#
UART Channel 3
UART Channel 2
UART Channel 1
16-bit
Timer/Counter
UART Channel 0
64 Byte TX FIFO
64 Byte RX FIFO
BRG
IR
ENDEC
TX &
RX
UART
Regs
2.97V to 5.5V VCC
GND
*All Inputs are 5V Tolerant
(Except XTAL1)
784BLK
RST#
16/68#
ENIR
A7:A0
IOR#
IOW#
CS#
INT#
D7:D0
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