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XR16L651
REV. 1.3.0
2.25V TO 5.5V UART WITH 32-BYTE FIFO
5
AEN#
24
I
Address Enable input (active low)
When AEN# transition to logic 0, it decodes and validates COM 1-4 ports
address per S1, S2 and S3 inputs.
S1
S2
S3
21
5
31
I
Select 1 to 3
These are the standard PC COM 1-4 ports and IRQ selection inputs. See
pull-up
resistor.
IRQA
IRQB
IRQC
30
29
23
O
Interrupt Request A, B and C Outputs (active high, tri-state)
These are the interrupt outputs associated with COM 1-4 to be connected to
the host data bus. See interrupt section for details. The Interrupt Requests A,
B or C functions as IRQx to the PC bus. IRQx is enabled by setting MCR bit-3
to logic 1 and the desired interrupt(s) in the interrupt enable register (IER).
LPT1#
12
O
Line Printer Port-1 Decode Logic Output (active low)
This pin functions as the PC standard LPT-1 printer port address decode logic
output, see
Table 1. The baud rate generator clock output, BAUDOUT#, is
internally connected to the RCLK input in the PC mode.
LPT2#
22
O
Line Printer Port-2 Decode Logic Output (active low)
This pin functions as the PC standard LPT-2 printer port address decode logic
output, see
MODEM OR SERIAL I/O INTERFACE
TX
8
O
Transmit Data or wireless infrared transmit data
This output is active low in normal standard serial interface operation (RS-
232, RS-422 or RS-485) and active high in the infrared mode. Infrared mode
can be enabled by connecting pin ENIR to VCC or through software setting
after power up.
RX
7
I
Receive Data or wireless infrared receive data
Normal received data input idles at logic 1 condition and logic 0 in the infrared
mode. The wireless infrared pulses are applied to the decoder. This input
must be connected to its idle logic state in either normal, logic 1, or infrared
mode, logic 0, else the receiver may report “receive break” and/or “error” con-
dition(s).
RTS#
32
O
Request to Send or general purpose output (active low)
This port may be used for one of two functions:
1) automatic hardware flow control, see EFR bit-6, MCR bit-1and IER bit-6.
2) RS485 half-duplex direction control, see XFR bits 2 and 5.
RTS# output must be asserted before auto RTS flow control can start.
CTS#
39
I
Clear to Send or general purpose input (active low)
If used for automatic hardware flow control, data transmission will be stopped
when this pin is de-asserted and will resume when this pin is asserted again.
See EFR bit-7 and IER bit-7.
DTR#
33
O
Data Terminal Ready or general purpose output (active low)
DSR#
40
I
Data Set Ready input or general purpose input (active low)
CD#
41
I
Carrier Detect input or general purpose input (active low)
RI#
42
I
Ring Indicator input or general purpose input (active low)
ANCILLARY SIGNALS
NAME
PIN #TYPE
DESCRIPTION