參數(shù)資料
型號: XR-4194CN
英文描述: VOLT REGULATOR|ADJUSTABLE|+-0.1 TO +-42V|BIPOLAR|DIP|14PIN|CERAMIC
中文描述: 電壓調(diào)節(jié)器|調(diào)節(jié)| -0.1?- 42V的|雙極|雙酯| 14PIN |陶瓷
文件頁數(shù): 9/16頁
文件大?。?/td> 98K
代理商: XR-4194CN
XR-4151
9
Rev. 2.01
Programming the XR-4151
The XR-4151 can be programmed to operate with a full
scale frequency anywhere from 1.0Hz to 100kHz. In the
case of the VFC configuration, nearly any full scale input
voltage from 1.0V and up can be tolerated if proper
scaling is employed. Here is how to determine component
values for any desired full scale frequency.
Set R
S
= 14k
or use a 12K resistor and 5K pot as
shown in the figures. (The only exception to this is
Figure 3).
1.
2.
Set T = 1.1 R
0
C
0
= 0.75[1/fo] where fo is the desired
full scale frequency. For optimum performance make
6.8k
> R
0
> 680k
and 0.001
μ
F < C
0
< 1.0
μ
F.
a)For the circuit of Figure 2 make C
B
= 10
-2
[1/fo]
Farads.
3.
Smaller values of C
B
will give a faster response
time, but will also increase the frequency offset and
nonlinearity.
b)For the active integrator circuit make
C
I
= 5 x 10
-5
[1/fo] Farads.
The operational amplifier integrator must have a
slew rate of at least 135 x 10
-6
[1/C
1
] volts per
second where the value of C
1
is in Farads.
a)For the circuit of Figure 3 keep the values of R
B
as shown and use an input attenuator to give
the desired full scale input voltage.
4.
b)For the precision mode circuit of Figure 3 set R
B
=
V
IO
/100
μ
A where V
IO
is the full scale input voltage.
Alternately, the operational amplifier inverting input
(summing node) can be used as a current input
with the full scale input current I
IO
= -100
μ
A.
For the FVC’s, pick the value of C
B
or C
I
to give the
optimum tradeoff between the response time and
output ripple for the particular application.
5.
Design Example
I.
Design a precision VFC (from Figure 4) with
fo = 100kHz and V
IO
= -10V.
1. Set R
S
= 14.0k
.
2. T = 0.75 [1/10
5
] = 7.5
μ
sec.
Let R
0
= 6.8k
and C
0
= 0.001
μ
F.
3. C
I
= 5 x 10
-5
[1/10
5
] = 500pF.
Op amp slew rate must be at least
SR = 135 x 10
-6
[1/500pF] = 0.27V/
μ
sec.
4. R
B
= 10V/100
μ
A = 100k
.
Design a precision VFC with fo = 1Hz and V
IO
= 10V.
1. Let R
S
= 14.0k
.
2. T = 0.75 [1/1] = 0.75 sec.
Let R
0
= 680k
and C
0
= 1.0
μ
F.
3. C
I
= 5 x 10
-5
[1/1]F = 50
μ
F.
4. R
B
= 100k
.
III. Design a single supply FVC to operate with a supply
voltage of 9V and full scale input frequency fo =
83.3Hz. The output voltage must reach at least 0.63
of its final value in 200msec. Determine the output
ripple.
1. Set R
S
= 14.0k
.
2. T = 0.75 [1183.3] = 9msec.
Let R
0
= 82k
and C
O
= 0.1
μ
F.
3. Since this FVC must operate from 8.0V, we shall
make the full scale output voltage at pin 6 equal to
5.0V.
4. R
B
= 5V/100
μ
A = 50k
.
5. Output response time constant is
τ
R
200msec.
Therefore,
τ
R
/R
B
= (200 x 10
-3
)/(50 x 10
3
) = 4
μ
F.
Worst case ripple voltage is
V
R
= (9ms x 135
μ
A)/4
μ
F = 304mV.
II.
C
B
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