參數(shù)資料
型號: XCV405E-6BG560I
廠商: Xilinx Inc
文件頁數(shù): 14/118頁
文件大?。?/td> 0K
描述: IC FPGA 1.8V 560-MBGA
產(chǎn)品變化通告: FPGA Family Discontinuation 18/Apr/2011
標(biāo)準(zhǔn)包裝: 1
系列: Virtex®-E EM
LAB/CLB數(shù): 2400
邏輯元件/單元數(shù): 10800
RAM 位總計: 573440
輸入/輸出數(shù): 404
門數(shù): 129600
電源電壓: 1.71 V ~ 1.89 V
安裝類型: 表面貼裝
工作溫度: -40°C ~ 100°C
封裝/外殼: 560-LBGA,金屬
供應(yīng)商設(shè)備封裝: 560-MBGA(42.5x42.5)
Virtex-E 1.8 V Extended Memory Field Programmable Gate Arrays
Module 4 of 4
DS025-4 (v3.0) March 21, 2014
34
R
— OBSOLETE — OBSOLETE — OBSOLETE — OBSOLETE —
7
IO_VREF_L266P_YY
K3
7
IO_L267N
L7
7
IO_L267P
K4
7
IO_L268N
L8
7
IO_L268P
J5
7
IO_L269N
K6
7
IO_VREF_L269P
H4
7
IO_L270N
H1
7
IO_L270P
K7
7
IO_L271N_Y
J7
7
IO_L271P_Y
J2
7
IO_L272N_YY
H5
7
IO_L272P_YY
G2
7
IO_L273N_YY
L9
7
IO_VREF_L273P_YY
G5
7
IO_L274N
F3
7
IO_L274P
K8
7
IO_L275N
G3
7
IO_L275P
E1
7
IO_L276N_YY
H6
7
IO_L276P_YY
E2
7
IO_L277N_Y
E4
7
IO_VREF_L277P_Y
K9
7
IO_L278N
J8
7
IO_L278P
F4
7
IO_L280N
G6
7
IO_L280P
C2
7
IO_L281N_Y
D2
7
IO_L281P_Y
F5
2DONE
AJ28
NA
DXN
AJ3
NA
DXP
AH4
3CCLK
F26
Table 5:
FG900 Fine-Pitch BGA Package — XCV812E
Bank
Description
Pin
NA
M0
AF4
NA
M1
AC7
NA
M2
AK3
NA
PROGRAM
AG28
NA
TCK
B3
NA
TDI
H22
2TDO
D26
NA
TMS
C1
NA
VCCINT
L11
NA
VCCINT
L12
NA
VCCINT
L19
NA
VCCINT
L20
NA
VCCINT
M11
NA
VCCINT
M12
NA
VCCINT
M19
NA
VCCINT
M20
NA
VCCINT
N13
NA
VCCINT
N14
NA
VCCINT
N15
NA
VCCINT
N16
NA
VCCINT
N17
NA
VCCINT
N18
NA
VCCINT
P13
NA
VCCINT
P18
NA
VCCINT
R13
NA
VCCINT
R18
NA
VCCINT
T13
NA
VCCINT
T18
NA
VCCINT
U18
NA
VCCINT
U13
NA
VCCINT
V13
NA
VCCINT
V14
NA
VCCINT
V15
Table 5:
FG900 Fine-Pitch BGA Package — XCV812E
Bank
Description
Pin
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