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| 型號： | XCS05XL-3TQ100C |
| 廠商： | Xilinx, Inc. |
| 英文描述： | Spartan and Spartan-XL Families Field Programmable Gate Arrays |
| 中文描述： | 斯巴達(dá)和Spartan - xL的家庭現(xiàn)場可編程門陣列 |
| 文件頁數(shù)： | 2/66頁 |
| 文件大小： | 809K |
| 代理商： | XCS05XL-3TQ100C |
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Spartan and Spartan-XL Families Field Programmable Gate Arrays
4-2
DS060 (v1.5) March 2, 2000
General Overview
Spartan series FPGAs are implemented with a regular,
flexible, programmable architecture of Configurable Logic
Blocks (CLBs), interconnected by a powerful hierarchy of
versatile routing resources (routing channels), and sur-
rounded by a perimeter of programmable Input/Output
Blocks (IOBs), as seen in
Figure 1
. They have generous
routing resources to accommodate the most complex inter-
connect patterns.
The devices are customized by loading configuration data
into internal static memory cells. Re-programming is possi-
ble an unlimited number of times. The values stored in
these memory cells determine the logic functions and inter-
connections implemented in the FPGA. The FPGA can
either actively read its configuration data from an external
serial PROM (Master Serial mode), or the configuration
data can be written into the FPGA from an external device
(Slave Serial mode).
Spartan series FPGAs can be used where hardware must
be adapted to different user applications. FPGAs are ideal
for shortening design and development cycles, and also
offer a cost-effective solution for production rates well
beyond 50,000 systems per month.
Spartan series devices achieve high-performance, low-cost
operation through the use of an advanced architecture and
semiconductor
technology.
Spartan-XL devices provide system clock rates exceeding
80 MHz and internal performance in excess of 150 MHz. In
contrast to other FPGA devices, the Spartan series offers
the most cost-effective solution while maintaining lead-
ing-edge performance. In addition to the conventional ben-
efit of high volume programmable logic solutions, Spartan
series FPGAs also offer on-chip edge-triggered single-port
and dual-port RAM, clock enables on all flip-flops, fast carry
logic, and many other features.
Spartan
and
The Spartan/XL families leverage the highly successful
XC4000 architecture with many of that family
’
s features and
benefits. Technology advancements have been derived
from the XC4000XLA process developments.
Figure 1: Basic FPGA Block Diagram
I
I
Rev 2.0
CLB
CLB
CLB
CLB
CLB
CLB
CLB
CLB
CLB
CLB
CLB
CLB
CLB
CLB
CLB
CLB
Routing Channels
I
I
I
I
I
I
IOB
IOB
IOB
IOB
IOB
IOB
IOB
IOB
I
I
I
I
I
I
I
I
IOB
IOB
IOB
IOB
IOB
IOB
IOB
IOB
VersaRing Routing Channel
RDBK
START
-UP
OSC
SCAN
B-
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