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參數(shù)資料
| 型號： | XCR3064XL-6CS48C |
| 廠商： | XILINX INC |
| 元件分類： | PLD |
| 英文描述： | XCR3064XL 64 Macrocell CPLD |
| 中文描述： | EE PLD, 6 ns, PBGA48 |
| 封裝： | 0.80 MM PITCH, CSP-48 |
| 文件頁數(shù)： | 1/9頁 |
| 文件大小： | 96K |
| 代理商： | XCR3064XL-6CS48C |
DS017 (v1.6) January 8, 2002
Product Specification
1-800-255-77781
2002 Xilinx, Inc. All rights reserved. All Xilinx trademarks, registered trademarks, patents, and disclaimers are as listed at
http://www.xilinx.com/legal.htm
.
All other trademarks and registered trademarks are the property of their respective owners. All specifications are subject to change without notice.
Features
Lowest power 64 macrocell CPLD
6.0 ns pin-to-pin logic delays
System frequencies up to 145 MHz
64 macrocells with 1,500 usable gates
Available in small footprint packages
-
44-pin PLCC (36 user I/O pins)
-
44-pin VQFP (36 user I/O pins)
-
48-ball CS BGA (40 user I/O pins)
-
56-ball CP BGA (48 user I/O pins)
-
100-pin VQFP (68 user I/O pins)
Optimized for 3.3V systems
-
Ultra-low power operation
-
5V tolerant I/O pins with 3.3V core supply
-
Advanced 0.35 micron five layer metal EEPROM
process
-
Fast Zero Power (FZP) CMOS design
technology
Advanced system features
-
In-system programming
-
Input registers
-
Predictable timing model
-
Up to 23 available clocks per function block
-
Excellent pin retention during design changes
-
Full IEEE Standard 1149.1 boundary-scan (JTAG)
-
Four global clocks
-
Eight product term control terms per function block
Fast ISP programming times
Port Enable pin for dual function of JTAG ISP pins
2.7V to 3.6V supply voltage at industrial temperature
range
Programmable slew rate control per macrocell
Security bit prevents unauthorized access
Refer to XPLA3 family data sheet (
DS012
) for
architecture description
Description
The XCR3064XL is a 3.3V, 64-macrocell CPLD targeted at
power sensitive designs that require leading edge program-
mable logic solutions. A total of four function blocks provide
1,500 usable gates. Pin-to-pin propagation delays are
6.0 ns with a maximum system frequency of 145 MHz.
TotalCMOS Design Technique for Fast
Zero Power
Xilinx offers a TotalCMOS CPLD, both in process technol-
ogy and design technique. Xilinx employs a cascade of
CMOS gates to implement its sum of products instead of
the traditional sense amp approach. This CMOS gate imple-
mentation allows Xilinx to offer CPLDs that are both high
performance and low power, breaking the paradigm that to
have low power, you must have low performance. Refer to
Figure 1
and
Table 1
showing the I
CC
vs. Frequency of our
XCR3064XL TotalCMOS CPLD (data taken with four
resetable up/down, 16-bit counters at 3.3V, 25
°
C).
0
XCR3064XL 64 Macrocell CPLD
DS017 (v1.6) January 8, 2002
0
14
Product Specification
R
Figure 1:
I
CC
vs. Frequency at V
CC
= 3.3V, 25°C
0.0
5.0
10.0
15.0
20.0
25.0
30.0
35.0
0
20
40
60
80
100
120
140
Frequency (MHz)
DS017_01_102401
T
C
(
Table 1:
I
CC
vs. Frequency
(V
CC
= 3.3V, 25
°
C)
Frequency (MHz)
0
1
5
10
20
40
60
80
100
120
140
Typical I
CC
(mA)
0
0.2
1.0
2.0
3.9
7.6
11.3
14.8
18.5
22.1
25.6
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相關(guān)代理商/技術(shù)參數(shù) |
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| XCR3064XL-6CS48I | 制造商:XILINX 制造商全稱:XILINX 功能描述:XCR3064XL 64 Macrocell CPLD |
| XCR3064XL-6CSG48C | 制造商:Xilinx 功能描述:CPLD COOLRUNNER XPLA3 1.5K GATES 64 MCRCLLS 200MHZ 0.35UM 3. - Trays |
| XCR3064XL-6PC44C | 功能描述:IC ISP CPLD 64 MCELL 3.3V 44PLCC RoHS:否 類別:集成電路 (IC) >> 嵌入式 - CPLD（復(fù)雜可編程邏輯器件） 系列:CoolRunner XPLA3 標(biāo)準(zhǔn)包裝:24 系列:CoolRunner II 可編程類型:系統(tǒng)內(nèi)可編程 最大延遲時間 tpd(1):7.1ns 電壓電源 - 內(nèi)部:1.7 V ~ 1.9 V 邏輯元件/邏輯塊數(shù)目:24 宏單元數(shù):384 門數(shù):9000 輸入/輸出數(shù):173 工作溫度:0°C ~ 70°C 安裝類型:表面貼裝 封裝/外殼:208-BFQFP 供應(yīng)商設(shè)備封裝:208-PQFP（28x28） 包裝:托盤 |
| XCR3064XL-6PC44I | 制造商:XILINX 制造商全稱:XILINX 功能描述:XCR3064XL 64 Macrocell CPLD |
| XCR3064XL-6VQ100C | 功能描述:IC CPLD 64 MACROCEL HP 100-VQFP RoHS:否 類別:集成電路 (IC) >> 嵌入式 - CPLD（復(fù)雜可編程邏輯器件） 系列:CoolRunner XPLA3 標(biāo)準(zhǔn)包裝:24 系列:CoolRunner II 可編程類型:系統(tǒng)內(nèi)可編程 最大延遲時間 tpd(1):7.1ns 電壓電源 - 內(nèi)部:1.7 V ~ 1.9 V 邏輯元件/邏輯塊數(shù)目:24 宏單元數(shù):384 門數(shù):9000 輸入/輸出數(shù):173 工作溫度:0°C ~ 70°C 安裝類型:表面貼裝 封裝/外殼:208-BFQFP 供應(yīng)商設(shè)備封裝:208-PQFP（28x28） 包裝:托盤 |
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