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參數(shù)資料
| 型號： | XCF16PVG |
| 廠商： | Xilinx, Inc. |
| 英文描述： | Platform Flash In-System Programmable Configuration PROMS |
| 中文描述： | 平臺Flash在系統(tǒng)可編程配置方案管理系統(tǒng) |
| 文件頁數(shù)： | 37/46頁 |
| 文件大?。?/td> | 525K |
| 代理商： | XCF16PVG |
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Platform Flash In-System Programmable Configuration PROMS
DS123 (v2.9) May 09, 2006
www.xilinx.com
37
R
Pinouts and Pin Descriptions
The XCFxxS Platform Flash PROM is available in the VO20 and VOG20 packages. The XCFxxP Platform Flash PROM is
available in the VO48, VOG48, FS48, and FSG48 packages.
Notes:
1.
VO20/VOG20 denotes a 20-pin (TSSOP) Plastic Thin Shrink Small Outline Package
2.
VO48/VOG48 denotes a 48-pin (TSOP) Plastic Thin Small Outline Package.
3.
FS48/FSG48 denotes a 48-pin (TFBGA) Plastic Thin Fine Pitch Ball Grid Array (0.8 mm pitch).
XCFxxS Pinouts and Pin Descriptions
XCFxxS VO20/VOG20 Pin Names and Descriptions
Table 13
provides a list of the pin names and descriptions for the XCFxxS 20-pin VO20/VOG20 package.
Table 13:
XCFxxS Pin Names and Descriptions
Pin Name
Boundary
Scan Order
Boundary Scan
Function
Pin Description
20-pin TSSOP
(VO20/VOG20)
D0
4
Data Out
D0 is the DATA output pin to provide data for configuring an
FPGA in serial mode. The D0 output is set to a
high-impedance state during ISPEN (when not clamped).
1
3
Output Enable
CLK
0
Data In
Configuration Clock Input. Each rising edge on the CLK input
increments the internal address counter if the CLK input is
selected, CE is Low, and OE/RESET is High.
3
OE/RESET
20
Data In
Output Enable/Reset (Open-Drain I/O). When Low, this input
holds the address counter reset and the DATA output is in a
high-impedance state. This is a bidirectional open-drain pin
that is held Low while the PROM completes the internal
power-on reset sequence. Polarity is not programmable.
8
19
Data Out
18
Output Enable
CE
15
Data In
Chip Enable Input. When CE is High, the device is put into
low-power standby mode, the address counter is reset, and
the DATA pins are put in a high-impedance state.
10
CF
22
Data Out
Configuration Pulse (Open-Drain Output). Allows JTAG
CONFIG instruction to initiate FPGA configuration without
powering down FPGA. This is an open-drain output that is
pulsed Low by the JTAG CONFIG command.
7
21
Output Enable
CEO
12
Data Out
Chip Enable Output. Chip Enable Output (CEO) is connected
to the CE input of the next PROM in the chain. This output is
Low when CE is Low and OE/RESET input is High, AND the
internal address counter has been incremented beyond its
Terminal Count (TC) value. CEO returns to High when
OE/RESET goes Low or CE goes High.
13
11
Output Enable
TMS
Mode Select
JTAG Mode Select Input. The state of TMS on the rising edge
of TCK determines the state transitions at the Test Access
Port (TAP) controller. TMS has an internal 50 K
Ω
resistive
pull-up to V
CCJ
to provide a logic 1 to the device if the pin is
not driven.
5
TCK
Clock
JTAG Clock Input. This pin is the JTAG test clock. It
sequences the TAP controller and all the JTAG test and
programming electronics.
6
TDI
Data In
JTAG Serial Data Input. This pin is the serial input to all JTAG
instruction and data registers. TDI has an internal 50 K
Ω
resistive pull-up to V
CCJ
to provide a logic 1 to the device if the
pin is not driven.
4
TDO
Data Out
JTAG Serial Data Output. This pin is the serial output for all
JTAG instruction and data registers. TDO has an internal
50 K
Ω
resistive pull-up to V
to provide a logic 1 to the
system if the pin is not driven.
17
VCCINT
+3.3V Supply. Positive 3.3V supply voltage for internal logic.
18
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| XCF16PVO48 | Platform Flash In-System Programmable Configuration PROMS |
| XCF16PVO48C | Platform Flash In-System Programmable Configuration PROMS |
| XCF16PVOG48 | Platform Flash In-System Programmable Configuration PROMS |
| XCF16PVOG48C | Platform Flash In-System Programmable Configuration PROMS |
| XCF32P | Platform Flash In-System Programmable Configuration PROMS |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| XCF16PVO48 | 制造商:XILINX 制造商全稱:XILINX 功能描述:Platform Flash In-System Programmable Configuration PROMS |
| XCF16PVO48C | 制造商:Rochester Electronics LLC 功能描述: 制造商:Xilinx 功能描述:Serial EEPROM, 48 Pin, Plastic, TSSOP |
| XCF16PVO48C | 制造商:Xilinx 功能描述: |
| XCF16PVO48C0973 | 制造商:Rochester Electronics LLC 功能描述: 制造商:Xilinx 功能描述: |
| XCF16PVO48CESB | 制造商:Xilinx 功能描述: |
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