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12/35
XC9511
Series
●
Application Information (Continued)
6. When the XC9511D to F series operate in PWM/PFM automatic switching control mode, the reverse current may
become quite high around the load current value when synchronous switches to non-synchronous and vise versa
(also refer to no. 5). Under this condition, switching synchronous rectification and non-synchronous rectification
may be repeated because of the reverse current, and the ripple voltage may be increased to 100mV or more. The
reverse current is the current that flows in the P
GND
direction through the N-ch driver transistor from the coil. The
conditions which cause this operation are as follows.
PFM Duty < Step down ratio = DC
OUT
/ V
IN
x 100 (%)
PFM Duty: 30% (TYP.)
Please use XC9511A to C types (PWM control) in cases where the load current value of the DC/DC converter is
close to synchronous.
■
NOTES ON USE (Continued)
●
DC/DC Waveform (1.8V, 600kHz) @ VIN=6.0V
7. With the DC/DC converter of the IC, the peak current of the coil is controlled by the current limit circuit. Since the
peak current increases when dropout voltage or load current is high, current limit starts operating, and this can lead
to instability. When peak current becomes high, please adjust the coil inductance value and fully check the circuit
operation. In addition, please calculate the peak current according to the following formula:
Peak current : Ipk = (V
IN
- D
COUT
) x OnDuty / (2 x L x Fosc) + I
DOUT
8. When the peak current, which exceeds limit current flows within the specified time, the built-in driver transistor is
turned off (the integral latch circuit). During the time until it detects limit current and before the built-in transistor
can be turned off, the current for limit current flows; therefore, care must be taken when selecting the rating for the
coil or the Schottky diode.
9. When V
IN
is low, limit current may not be reached because of voltage falls caused by ON resistance or serial
resistance of the coil.
10. In the integral latch circuit, latch time may become longer and latch operation may not work when V
IN
is 3.0V or
more.
11. Use of the IC at voltages below the recommended voltage range may lead to instability.
12. This IC and the external components should be used within the stated absolute maximum ratings in order to prevent
damage to the device.
13. When using IC with a regulator output at almost no load, a capacitor should be placed as close as possible between
A
VDD
and A
GND
(C
IN
2), connected with low impedance. Please also see the recommended pattern layout for your
reference. Should it not be possible to place the input capacitor nearby, the regulated output level may increase up
to the V
DD
level while the load of the DC/DC converter increases and the regulator output is at almost no load.
< External Components>
L:10
μ
H(CDRH5D28,SUMIDA)
CIN:4.7
μ
F(ceramic)
CL:10
μ
F(ceramic)
Step-down ratio: 1.8V / 6.0V = 30% <PFM Duty 31%>